Cypress CY7C68003 manual Features, Applications, TX2UL Block Diagram

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DATA BRIEF

CY7C68003

MoBL-USB™ TX2UL USB 2.0

ULPI Transceiver

Features

The Cypress MoBL-USBTX2UL is a low voltage high speed (HS) USB 2.0 ULPI Transceiver.

The TX2UL is specifically designed for mobile handset applications by offering tiny package options and low power consumption.

USB 2.0 Full Speed and High Speed Compliant Transceiver

Multi-Range (1.8V to 3.3V) IO Voltages

Fully Compliant ULPI Link Interface

8-bit SDR ULPI Data Path

UTMI+ Level 0 Support

Integrated Oscillator

Integrated PLL (13, 19.2, 24, or 26 MHz Reference)

Integrated USB Pull Up and Termination Resistors

3.0V to 5.775V VBATT Input

Chip Select Pin

Single Ended Device RESET Input

UART Pass Through Mode

ESD Compliance:

JESD22-A114D 8 kV Contact Human Body Model (HBM) for DP, DM, and VSS Pins

IEC61000-4-2 8 kV Contact Discharge

IEC61000-4-2 15 kV Air Discharge

Support for Industrial Temperature Range (-40°C to 85°C)

Low Power Consumption for Mobile Applications:

5 uA Nominal Sleep Mode

30 mA Nominal Active HS Transfer

Small Package for Mobile Applications:

2.14 x 1.76 mm 20-pin WLCSP 0.4 mm Pitch

4 x 4 mm 24-pin QFN

Applications

Mobile Phones

PDAs

Portable Media Players (PMPs)

DTV Applications

Portable GPS Units

TX2UL Block Diagram

 

 

 

 

TX2UL

 

 

 

 

 

CLOCK

 

 

ULPI Block

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DATA[7:0]

 

IO

Operational

Tx/Rx

 

 

 

 

 

 

Control/

mode

 

 

DP

 

 

DIR

 

Data

tracking

Core

 

 

 

 

 

 

USB

 

 

 

 

 

Logic

interrupt

 

UTMI+

 

 

 

STP

 

 

FS/HS

 

 

 

 

 

Registers

 

Level0

 

 

 

NXT

 

 

 

PHY

DM

 

 

 

 

Block

 

 

 

 

 

 

 

 

ULPI Wrapper

 

 

 

 

 

 

 

 

 

 

 

RXD

 

 

 

 

 

 

 

 

 

TXD

 

 

 

 

RESET_N

 

Global Control Block

 

 

 

 

 

 

Reset / Clock / Power /

 

 

 

 

 

 

CS_N

 

3.3V Regulator

 

 

 

 

 

Misc. Control

 

 

 

 

(3.0 –

VBATT

 

 

 

 

Block

 

 

 

5.775V)

VCC

POR

 

 

 

 

 

 

 

 

 

1.8V

 

 

 

 

(1.8V)

 

 

 

 

 

 

 

 

XI

 

 

PLL

 

Bandgap

 

 

 

13/19.2/

XOSC

 

 

 

 

 

XO

 

 

 

 

 

24/26 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Cypress Semiconductor Corporation

198 Champion Court

San Jose, CA 95134-1709

408-943-2600

Revised April 1, 2009

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Contents TX2UL Block Diagram FeaturesApplications Cypress Semiconductor CorporationFunctional Overview Parameter Description Specification Unit Min Max Power DomainsClocking External Clock RequirementsTX2UL 20-Pin CPS Package Operation Modes Operation ModesMode TX2UL 24-Pin QFN Package Operation ModesSleep Mode Ulpi Low Power ModeVID and PID