Cypress CY62256 Read Cycle No 12, Write Cycle No WE Controlled, Write Cycle No CE Controlled

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			CY62256
Switching Waveforms (continued)
Read Cycle No. 2 [12, 13]		tRC
CE		tRC
CE
	tACE
OE
	tDOE	tHZOE
	tDOE	tHZCE
	tLZOE	tHZCE	HIGH
	tLZOE		HIGH
DATA OUT	HIGH IMPEDANCE	DATA VALID	IMPEDANCE
DATA OUT		DATA VALID
	tLZCE	tPD
	tPU	tPD
VCC	tPU		ICC
SUPPLY	50%		50%
CURRENT			ISB
	[9, 14, 15]

Write Cycle No. 1 (WE Controlled)

	tWC
ADDRESS
CE
	tAW	tHA
tSA	tPWE
WE
OE
	tSD	t
		HD

DATA I/O

NOTE 16

DATAIN VALID

tHZOE

[9, 14, 15]

Write Cycle No. 2 (CE Controlled)

	tWC
ADDRESS
CE	tSCE
tSA
tAW		tHA
WE
	tSD	tHD
DATA I/O	DATAIN VALID
Notes:

13.Address valid prior to or coincident with CE transition LOW.

14.Data I/O is high impedance if OE = VIH.

15.If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.

Document #: 38-05248 Rev. *B

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Contents Cypress Semiconductor Corporation FeaturesInputbuffer ColumnElectrical Characteristics Over the Operating Range Pin ConfigurationsMaximum Ratings Operating RangeCapacitance4 Data Retention CharacteristicsAC Test Loads and Waveforms Data Retention WaveformSwitching Waveforms Switching Characteristics Over the Operating Range6CY62256− Parameter Description Min Max Unit Read Cycle Write Cycle9Write Cycle No CE Controlled Read Cycle No 12Write Cycle No WE Controlled Write Cycle No WE Controlled, OE LOW Typical DC and AC Characteristics Truth Table Inputs/Outputs Mode PowerOrdering Information Normalized Supply VoltageLead 300-mil SNC Narrow Body SN28 Package DiagramsLead 600-mil Molded DIP P15 Lead Thin Small Outline Package Type 1 8 x 13.4 mm Z28 Date Change Description of Change REV ECN no