Atmel AT91EB42 manual Circuit Description

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Circuit Description

of watchdog time-out as the pin NWDOVF of the AT91M42800 is connected to its input MR.

The assertion of this reset signal will light up the red RESET LED (D10). By pressing the

CLEAR RESET push button (S1), the LED can be turned off.

Another supervisory circuit initializes separately the microcontroller-embedded JTAG/ICE interface when the 3.3V supply voltage drops below 3.0V. Note that this volt- age can be changed, depending on the board production series. These separated reset lines allow the user to reset the board without resetting the JTAG/ICE interface while debugging.

The schematic (Figure 6-5 on page 6-6in Section 6, "Appendix B - Schematics") also shows eight general-purpose LEDs connected to port B PIO pins (PB8 to PB15).

Two 9-way D-type connectors (P3/4) are provided for serial port connection.

Serial port A (P3) is used primarily for host PC communication and is a DB9 female con- nector. TXD and RXD are swapped so that a straight-through cable can be used. CTS and RTS are connected together, as are DCD, DSR and DTR.

Serial port B (P4) is a DB9 male connector with TXD and RXD obeying the standard

RS-232 pinout. Apart from TXD, RXD and ground, the other pins are not connected.

LEDs are connected to the TX and RX signals of both serial ports and show activity on these serial links.

A MAX3223 device (U10) and associated bulk storage capacitors provide RS-232 level conversion.

4.7Layout Drawing The layout diagram (Figure 6-1 on page 6-2in Section 6, “Appendix B – Schematics”) shows an approximate floorplan for the board. This has been designed to give the low- est board area, while still providing access to all test points, jumpers and switches on the board.

The board is provided with four mounting holes, one at each corner, into which feet are attached. The board has two signal layers and two power planes.

AT91EB42 Evaluation Board User Guide

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Contents AT91EB42 Evaluation Board User Guide Page Table of Contents Table of Contents Appendix a Configuration StrapsScope Section OverviewDeliverables Evaluation Board Two serial portsASB OverviewElectrostatic Warning Section Setting Up the AT91EB42 Evaluation BoardLayout Board TestingMeasuring CurrentAT91EB42 Evaluation Board Section On-board SoftwareProgram Default Speed Programmed Default Memory MappingDownloader On-board SoftwareSection Circuit Description ConnectorsProcessor ExpansionMemories PowerConverter Crystal QuartzCircuit Description Circuit Description Configuration Straps CB1 23, JP1 Section Appendix a Configuration StrapsAppendix a Configuration Straps CB19 PB18 End of Fast Charge Signal CB18 PB20 ADC Write Access SignalCB15 Serial DataFlash Enabling CB17 SPI Eeprom EnablingMeasurement ConsumptionStrap JP5 JP6 Increasing Memory SizeSchematics Section Appendix B SchematicsPCB Layout Appendix B SchematicsEBI Memories AT91EB42 Evaluation Board User GuideAppendix EBI Memories SchematicsI/O and EBI Expansion Connectors Valbp Serial InterfaceAT91M42800 ICE Reset and Jtag Schematics InterfaceVDDCORE=1.8V Saft VRE 1/2 AA AT91EB42 Evaluation Board User Atmel Headquarters Atmel Operations