Silicon Laboratories CP2112-EK manual Pin Configuration Tab

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CP2112-EK

10.Figure 4 shows the Pin Configuration tab, which allows you to configure the GPIO and Special Functions (TX Toggle, RX Toggle, and Clock Output).

a.GPIO pins toggle between Input/Ouput and Open-Drain/Push-Pull by clicking the corresponding GPIO boxes in the “GPIO Configuration” section. The boxes for TX Toggle, RX Toggle, and Clock Output can be checked to enable the Special Functionality. The “Set GPIO Config” button must be clicked in order for the settings to change.

b.The “Latch Values” section allows for the GPIO latches to be read or written to. Clicking the box next the GPIO pins listed will scroll through “1”, “0”, and “X”. Write Latch must be clicked to change the state of the GPIO latch.

Figure 4. Pin Configuration Tab

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Rev. 0.2

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Contents Software Setup Kit ContentsCP2112 Hardware Interface CP2112-EK CP2112 Windows ApplicationData Transfer Tab Pin Configuration Tab Customization Tab Target Board LED Headers J1, J2, J3, J4SMBus Signals TB1, H1 VDD and VIO Power Connector J6SMBus Pull-Up Voltage Connector J7 Suspend LED Connector J8Schematic CP2112 Evaluation Board SchematicDocument Change List Revision 0.1 to RevisionContact Information