Installation
JP8 is used to indicate the frequency of the CPU bus clock to the ETEQ chipset.
JP9 and JP10 are used to determine that the SDRAM is running at the frequency of the CPU bus clock or the AGP clock.
CPU BUS | AGP BUS | PCI Clock | JP10 | JP8 | JP9 | SDRAM | |
Clock | Clock | Clock | |||||
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66MHz | 66MHz | 33MHz | 66MHz | ||||
75MHz | 75MHz | 37.5MHz | 75MHz | ||||
83MHz | 55MHz | 27.5MHz | 55MHz | ||||
83MHz | |||||||
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95MHz | 63.4MHz | 31.7MHz | 63.4MHz | ||||
95MHz | |||||||
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100MHz | 66MHz | 33MHz | 66MHz | ||||
100MHz | |||||||
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112MHz | 75MHz | 37.5MHz | 75MHz | ||||
112MHz | |||||||
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124MHz | 82.6MHz | 41.3MHz | 82.6MHz | ||||
124MHz | |||||||
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Note: Use 8ns or faster SDRAM modules (for PC100) when SDRAM is set to run at
the frequency of 95/100MHz.
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