INDEX
N
notation conventions, xiii
O
optional interfaces, 1-5
P
PHY devices, 1-6power
select jumper (JP1), 2-4supply, 2-4
Power-over-Ethernet (PoV) interface (ADSP-BF537 processors), 1-5,2-4
product overview, viii programmable flags (PFs)
PF10 (ADSP-BF533/61 USB_IRQ), 1-4, 2-7
PF11 (ADSP-BF533/61 USB devices), 1-3
PF6 (ADSP-BF537 USB devices), 1-3PF7 (ADSP-BF537 USB_IRQ), 1-4,2-7PF9 (ADSP-BF533/61 Ethernet IRQ),
1-4
R
reset operation, 1-4
S
schematic, of USB-LAN EZ-Extender, B-1serial ROM enable switch (SW2.1), 2-8,
2-9
setup, of USB-LAN EZ-Extender, 1-1SMSC 91C111 device, 2-5supervisory reset circuit, 1-4SW1.1 (address enable) switch, 2-6SW1.2 (flag enable) switch, 2-7SW1.3 (USB IRQ enable) switch, 2-7SW1.4 (test mode enable) switch, 2-8SW2.1 (serial ROM enable) switch, 2-8,
2-9
SW2.2-2.4 (IOS) switch, 2-9switches
See also SWx
map of locations, 2-6system architecture, 2-2
T
test mode enable switch (SW1.4), 2-8
U
USB interface, 1-3devices, viii, 1-4
IRQ enable switch (SW1.3), 2-7software documentation, 1-2
USB_IRQ line, 1-4, 2-7
