Texas Instruments SLOU061A manual Area 100-Single Device Soic, Shows the area 100 schematic

Physical Considerations

2.2 Area 100—Single Device SOIC

Area 100 uses 1xx reference designators, and is compatible with a single op amp, with or without shutdown, packaged as an 8-pin SOIC. This surface-mount package is designated by a D suffix in TI part numbers, as in TxxxxCD, TxxxxID, etc.

Offset nulling can be extremely important in some applications. The EVM accommodates TI IC op amps that provide this feature. The input offset can be adjusted by connecting a 100-kΩpotentiometer between terminals 1 and 5 of the device and connecting the wiper to VCC– via a resistor (R101) as shown below. This resistor is used to fine tune the offset adjustment. For example, when using the TLC070 or TLC071 device and a 100-kΩnulling potentiometer, the offset voltage adjustment is ± 10 mV when R101 is 5.6 kΩ and ± 3 mV when R101 is 20 kΩ .

When using the nonshutdown version of the device, pin 8 of the IC is a no connect.

Figure 2–1 shows the area 100 schematic.

Figure 2–1. Area 100 Schematic—Single Device, SOIC (8 pin)

		V1+			R114		C110
V1+							R112
				R110	C109
C107	C108
			A101–				V1+
GND1
				R109			7	U101
						2		8
C105	C104		A102–				–		6
				R103	R104
						3 +
V1–			A103+						5
								4
							1
Power Supply Bypass			A104+
		V1–		R102				V1–
R108							R107
V1+			VREF1
U102	R111		C101	R105		R101
		C106				C102	V1–

R113

Voltage Reference

SD

OUT

R106

A1 FLT

C103

Evaluation Module Layout 2-3