Sanyo EP93F manual LA1776M New, Productt

Page 28

System-on-Chip Tuner IC for Car Stereo Systems

LA1776M New

productt

Overview

The LA1776M is a car radio AM/FM tuner IC that is based on the current LA1787M but features improved AM upconversion (for improved reception characteristics) and improvements in most other characteristics as well. The LA1776M pin arrangement is only slightly changed from the LA1787M for easy printed circuit board pattern design.

Functions

 

 

 

■ FM front end

■ FM IF

■ Noise canceller

■ MRC

■ Multiplex

■ AM upconversion

■ FM/AM switch

 

Features

■Characteristics improved by new noise prevention measures in the mixer and amplifier blocks

■Three-signal characteristics improved due to increased dynamic range in the FM front end mixer

■Improved AM practical sensitivity and saturation signal-to-noise ratio

■FM S-meter shifter function can adjust for sample-to-sample variations in the S-meter

(Fixed resistors are used for SD, KEYEDAGC, MUTE ON ADJ, MUTE ATT, SNC, and HCC.)

■High-speed search is possible using the FM band muting time constant switching function

■The low power consumption of the earlier device has been reduced even further

■Increased flexibility in the MRC setting

■Package: QIP64E (14 14 mm)

Block Diagram

ST IND

5V

AM/FM SD

F0.022∝

 

F0.022∝

 

 

AGC-RF

BYPASS

 

IFT-AM

 

AM-IF-AGC

MUTE-ON

 

KEYEDAGC

 

PILOT-DET

 

FM-SD-ADJ

 

0.022∝F

 

 

1

 

 

9p

 

2.7V

MUTE-DRIVE

FM-VSM 1000p

 

 

 

BV

D - ANT - AM

IN - WAGC - AM

 

F ∝

 

3.3

 

ADJ

10k

F 1 ∝

 

LC AM

F 100 ∝

VCC

SD AM/FM IND ST

100k

 

 

 

30k

1.3k

+

F 2.2 ∝

 

 

 

 

 

VCC

 

 

 

 

56k∝F

 

 

 

 

 

 

 

 

 

 

 

0.022∝F

 

 

 

 

 

 

 

 

 

 

 

 

 

+

 

 

+

 

 

 

+

 

 

+

 

 

 

F∝

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

75

100k

AM 2nd

48

 

47

46

45

 

44

43

42

 

41

40

39

38

 

37

36

35

34

33

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

min:5k

MIX IN

49

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Electronic Tuninguning ETRETR ControllersControllers

LC723500 SeriesSeries

Overview

The LC72350 Series (LC72358N, LC72362N, and LC72366) are system-on-chip electronic tuning microcontrollers with a 1.33 ∝s instruction execution time.

These devices include both a high-speed locking circuit and a high-performance direct PLL circuit that can control the local oscillator C/N characteristics.

Functions

■ROM: 16 KB (LC72358N) 24 KB (LC72362N)

32 KB (LC72366)

■RAM: 512 nibbles (LC72358N and LC72362N) 1024 nibbles (LC72366)

■A/D converter: 6-bit successive approximation A/D converter with 6 input channels

■PLL: Built-in sub-charge pump for high-speed locking, built-in dead zone control

■Serial I/O: Three channels (8-bit 3-wire serial I/O)

■Multiple interrupt support: 4 levels

■Cycle time: 1.33 ∝s (4.5 MHz)

■QTP version: LC72P366

■Package: QIP80E (14 20 mm)

 

 

Block Diagram

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EO1

EO2

BUSPD

EO3

 

 

PPQ

PP3

PP2

PP1

PP0

PO3

PO2

PO1

PO0

PN3

PN2

PN1

PN0/BEEP

 

PM3

PM2

PM1

PM0

PL3

PL2

PL1

PL0

PK3

PK2

PK1/INT1

PK0/INT0

PJ3

PJ2

PJ1

PJ0

PI1/ADI5

PI0/ADI4

 

PH3/ADI3

PH2/ADI2

PH1/ADI1

PH0/ADI0

 

PHASE DETECTOR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MPX

BEEPTONE

 

 

 

 

 

 

 

 

 

 

 

 

INTERUPT

 

 

 

 

 

 

 

 

 

 

 

SUB C.P

PHASE DETECTOR

DATA LATCH

BUS

DRIVR.

DATA

LATCH

BUS

DRIVR.

DATA

LATCH

BUS

DRIVR.

DATA

LATCH

BUS

DRIVR.

DATA

LATCH

BUS

DRIVR.

DATA

LATCH

BUS

DRIVR.

DATA

LATCH

BUS

DRIVR.

DATA LATCH

BUS

DRIVR.

BUS

DRIVR.

MPX

DATA

LATCH

BUS DRIVR.

 

IOS

IOS

IOS

IOS

 

IOS

620

 

1M

 

 

 

100∝F

 

FC18G

15p

15p

 

 

 

 

FM-IF-IN2

50

 

 

 

0.022∝F

100

220

 

AMDET

 

 

 

MUTE

51

AM

AMLC

 

 

 

IF2

 

 

 

AM-IF-IN

52

AM

AMIF

ANT D

 

 

 

AM

 

 

AM-IF-OUT

AGC

 

 

 

IF1

 

AGC

 

 

FM-IF-OUT 53

AM MIX

AM

drive

 

AM-MIX-OUT

 

 

 

 

 

54

 

Vsm

AM

 

 

FM-WB-AGC

 

 

 

W-AGC

 

 

 

 

 

 

 

 

MUTE

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

drive

 

 

 

 

 

 

IF-AMP

 

 

 

 

 

 

 

 

1

2

 

 

 

 

IF-AMP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IF-AMP

 

 

 

 

FM AFC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IF-AMP

 

 

 

 

 

H det

 

 

 

 

 

IF-AMP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

s mute

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IF-AMP

 

 

 

 

DET-OUT

 

 

 

 

 

31∝F

+

8200p

Q.DET

REG

SW

 

 

0.22

 

68k

2.7V

 

 

30 NC-IN

+0.22∝F

 

 

 

MUTE

REG

IF

MRC

29 HCC

30k

NC.MPX

count AMP

 

 

 

 

AMP.

REG

 

out2

28

SNC

 

 

 

IF

 

 

 

3.3∝F

Mute

FM IF

 

MRC-OUT

count SW

time

ATT

 

27

 

 

+

 

 

const

 

 

control

 

 

 

GAD

 

 

CONTROL

BUS CONTROL

INSTRU- CTION DECODER

SKIP

 

JUDGE

read/sritc status register

read only status register

 

JMP CAL RETURN INTERRUPT RESET

CF

ADC (6 bits)

∝

AM-SD-ADJ

AM

100 F

100k 100∝F

+

30M

 

0.022∝F

0.022∝F

470

0.022∝F

100k

 

55

 

X OSC

AM

 

100k

RF-AGC

 

 

 

N-AGC

 

 

56

 

 

 

 

 

AM-IF-IN1

 

 

 

200

 

FM-IF-IN1

57

1ST

 

KEYED

6p AM-NB-AGC

IF

 

AGC

AMP

 

 

IN

MUTE-ATT

58

 

 

 

 

 

 

 

LEVEL

W-AGC

 

 

MIX-OUT

 

DET

 

 

 

59

 

 

 

Zap

FM Vsm

0.022∝F

22∝F

+

30

1000p

 

 

 

 

100k

 

 

1000p

 

 

 

MIX-OUT

 

 

 

3p

33

FE

60

AM/FM MIX

N-AGC

 

 

 

 

 

 

VCC

61

 

 

 

 

 

 

 

 

 

 

AM-MIX-IN

62

 

AM OSC

AM OSC

 

MIX-IN10p

FM RF

 

 

BUFF

 

 

63

AGC

 

 

 

 

FM OSC

FM OSC

 

 

10p

 

 

 

64

ANT-D

BUFF

 

 

 

 

 

 

MIX-IN

NC

 

NC

HPF

LPF

ECL

 

 

ECL

-

+

ECL

ECL

NC TRIG AGTE

ECL AGC

 

SVC208

 

 

 

 

100k 100k

1

2

GNDFE

4

5

33k

SEN

8

 

9

1000p

100k

180

F0.1∝

 

0.001∝F

FMANT D

RF1FM -AGC

SVC208 18p

8p FMOSC

33p 22p

1000p

NOISEAGC 150k 0.47∝F

AGCADJ AM/FM OSCBUFF

300p

OSC

15p

 

 

 

1000p

 

 

+

 

 

 

 

 

+

 

 

 

 

 

 

 

 

220k

 

 

AGC

 

 

 

 

 

 

 

1000p

 

 

 

100

 

 

 

 

 

 

 

 

 

 

 

 

100k

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

30k

 

 

AM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

REG

 

REG

FM/AM

 

 

26

+

MRCADJ

 

 

MRC

 

 

BUFF

 

 

AM

SD-ST IND

3.3∝F 51k

 

 

 

 

 

noise

 

 

 

REG

AM/FM

 

amp

25 GND

 

 

 

 

 

 

 

AM/FM VSM

∝

 

 

 

FE

 

 

 

 

 

 

 

SW

 

 

24

+

0.022 F

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IF COUNT

 

 

 

 

 

 

 

 

 

23 BUFFER

 

 

 

 

 

 

 

 

 

PHASE-COM

 

 

 

 

VCO

phase

tri

22

PHASE-

+

 

HCC

 

comp

ger

 

 

 

 

stop

 

 

 

21 COM

+

 

 

 

 

 

 

pilot

 

 

SNC

 

FF 38k

FF

20 VCO

 

 

 

 

det

 

 

 

 

 

 

19k

CSB

 

 

 

 

 

 

pilot

SEP-ADJ912kHz

 

 

 

FF

VCO

 

can

19

20k 0.047∝F

 

 

 

 

 

 

Sud De

18

 

 

 

 

 

 

 

100k

 

 

 

Main

 

 

coder

 

 

 

 

 

MATRIX

PI-CAN

 

 

 

 

 

HC

 

17 OUT

 

 

 

 

 

 

 

 

 

 

10

11

12

13

14

15

16

PI-CAN 0.01∝F

 

IN

 

 

6800p

PLL IN

10.25M IN

NC,MPX GND

MPX OUT L 0.015∝F

MPX OUT R 0.015∝F

 

 

 

 

HOLD

LPFOUT 0.01∝F

 

 

 

 

0.022∝F

47k IF Buffer

5/2.5/0V

REFERENCE DIVIDER

 

PROGRAMABLE DIVIDER

 

 

 

PLL Data Latch PLL

 

 

ADDRESS DECODER

 

(LC72366) BANK

 

 

 

 

 

 

 

 

 

 

PROGRAM COUNTER

 

STACK BANK

 

 

 

 

 

DO

JDC CCD

 

DATA BUS

 

 

 

 

 

Time PHASE CONTROL UNIVERSAL COUNTER (20 bits)

RAM 512k 4bits

(LC72358/362)

1024k 4bits

 

 

8k 16bits

(LC72358)

12k 16bits (LC72362)

16k 16bits (LC72366)

ADDRESS DECODER

 

 

 

LATCE A ALU

 

B INTERRUPT

 

CSUST

 

 

1/114,1/124

 

 

 

 

ROM

14

14

 

LATCE

TIMER 0

TIMER 1

 

DIVIDER

SYSTEM CLOCK GEMERATOR

1/16,1/17

 

SNS

SNS F/F

VDET RESET

RESET

1/2

 

BUS

DRIVR.

DATA

LATCH

BUS DRIVR.

DATA

LATCH

BUS

DRIVR.

DATA

LATCH

BUS DRIVR.

DATA LATCH IOS

BUS DRIVR.

DATA

LATCH IOS

BUS

DRIVR.

ISO

3

DATA LATCH IOS

BUS DRIVR.

XIN

 

 

 

 

SNS

VDD VSS

 

 

PA0

PA1

PA2 PA3

PB0

PB1

PB2

PB3

PC0

PC1

PC2

PC3

PD0

PD1

PD2

PD3

PE0

 

PF0

 

 

 

 

 

PG0

 

AM VCC 8V AM ANT AM/FM ANT IN FE GND AM/FM VT FE VCC

AM/FM SW

AM/FM

10.25kHz IN

L-ch R-ch

GND VCC FM/AM VSM

OSC BUFF

XOUT

FMIN

AMIN

HCTR

LCTR

MOLD TEST1 TEST2

PCK2/PE1

SO2/PE2

SI2/PE3

PCK1/PF1

SO1/PF2

SI1/PF3

PCK0/PG1

SO0/PG2

SI0/PG3

 

51 Car Audio

52 Car Audio

 

 

 

Page 27 Page 29
Image 28
Page 27 Page 29
Contents
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