Panasonic PT-50LC13 Video Signal Path I Block Diagram 1/2, Rear Jack C.B.A Main C.B.A, Input

VIDEO SIGNAL PATH I BLOCK DIAGRAM (1/2)

REAR JACK C.B.A.

MAIN C.B.A.

COMPONENT -Y1

COMPONENT -PB1

COMPONENT -PR1

COMPONENT -Y2

COMPONENT -PB2

COMPONENT -PR2

COMPONENT -Y3

JK3601

JK3602

JK3603

IC3602 (SW)
14
16
18	TP3603
5
	TP3602
7
9
	TP3601
57

IC5002 (5.6M FIFO MEMORY)

5.6M FIFO MEMORY

		1,13,19,22,35,41,
+3.3V	VCC	49,52,53,58,66

				IC5005 (MAIN VIDEO SIGNAL PROCESS)
				123-127,140-144
				120-122,128,129,
				138,139,145-147			R
					2,18,34,47,60,107,119,		6-13
					132,149,166,181,185,		G
		+3.45V		VCC	195,197,208,213,224
						Y/PB/PR --RGB CONVERTER	153-160
							B
	IC5006					SHARPNESS CONTROL
					67,69,77,79,89,91,100		199-206
+3.3V	5	+2.5V	4	VCC		TINT CONTROL
		REG.				COLOR CONTROL	76MHz CLOCK 16
	IC5004					BRIGHTNESS CONTROL	V-SYNC 162
							H-SYNC 163
					173,177,189,229,233
		+2.5V
	5		4	VCC
		REG.					Y
	IC5003						36-45
					3,17,33,46,59,106,131,		PB/PR
					151,170,183,193,211,
		+2.5V					22-31
	1		3	VCC	236,241,246,253
		REG.					CLOCK 32
							V-SYNC 21

COMPONENT -PB3

COMPONENT -PR3

COMPONENT -Y4

COMPONENT -PB4

COMPONENT -PR4

S-VIDEO IN1

JK3604

JK3501

Y

C

	MAIN Y/V	46	P3601-18
59
	MAIN PB/C
		44	P3601-16
61	MAIN PR	43	P3601-15
48
	SUB Y/V	38	P3601-13
50
	SUB PB/C
		36	P3601-11
52	SUB PR	35	P3601-10
	VIDEO		TP3604
	INPUT
IC3501 (AUDIO/VIDEO SW)	SELECT
			TP3605

	Q5001	B
P3403-18
	Q5002	B
P3403-16
	Q5003	B
P3403-15
	Q5015	B
P3403-13
	Q5016	B
P3403-11
	Q5017	B
P3403-10

LPF

LPF

LPF

LPF

LPF

LPF

Q5006 B

Q5007 B

Q5008 B

Q5023 B

Q5024 B

Q5025 B

Q5010	B	95	Y/V	A/D		H-SYNC 20
Q5012,			PB/C		3D Y/C SEPARATION	Y/PB/PR
Q5013	B	72		A/D
					NTSC DECODER	49-58
Q5011			PR
	B	83		A/D		GCM2+
Q5027	B
Q5029,
Q5030	B
Q5028	B
					CARD Y/PB/PR DATA(8BIT)

FROM SD/PC CARD
SIGNAL PROCESS	CARD V-SYNC
BLOCK DIAGRAM
	CARD H-SYNC

IC5803 (DVI DECODER)

VIDEO IN1

S-VIDEO IN2

VIDEO IN2

Y C

63
1
8
15
30	MAIN S-VIDEO-C			TP3606
		47	67
3
10
17	MAIN S-VIDEO-Y
	/MAIN VIDEO	44	66

JK5801

R

R DATA(8BIT)

TMDS DATA0(+)

90

TMDS DATA0(-)

30-37

91

TMDS DATA1(+)

ENCRYPTED

UUENCRYPTED

85

PANEL

G

TMDS DATA1(-)

TMDS

DATA (24 bit)

XOR

DATA (24 bit)

G DATA(8BIT)

86

TMDS DATA2(+)

DECODER

INTERFACE

20-27

DVI-IN

80

MASK

TMDS DATA2(-)

LOGIC

81

TMDS CLOCK(+)

B

B DATA(8BIT)

93

TMDS CLOCK(-)

94

10-17

DDC CLOCK

CONTROL

DDC DATA

IC5802 (EEPROM)

Q5802

I2C SERIAL CLOCK

6

DRIVE

100

I2C SERIAL CLOCK

Q5801

47

8 VCC

I2C SERIAL DATA

5

DRIVE

3

I2C SERIAL DATA

44

FRONT JACK C.B.A.

	JK4801
S-VIDEO IN3	Y	P3902-3	P3502-3
	C
		P3902-5	P3502-5
VIDEO IN3		P3902-7	P3502-7

5
12	VIDEO
19
	INPUT
	SELECT
	SUB

		48
+5V	RESET(L) <FROM IC6003(73)>	1 RESET(L)

		6,18,29,38				82,84,88,95,97
	VCC	43,57,67,78
						VCC
			IC5801				IC5503
FRONT JACK C.B.A.	+3.3V	+5V	3	+3.3V	2	+5V	8	+3.3V	1
				REG.				REG.

TUNER C.B.A.
U7001
(MAIN TUNER)	TP7001
RF-IN	Q7002
	P7002-1
VIDEO 25

RF-OUT		R7011
		MAIN TUNER
		VIDEO LEVEL
U7101
(SUB TUNER)
		Q7101
RF-IN	VIDEO 25	P7002-3

P3501-1

P3501-3

S-VIDEO-Y	56	74
SUB	58	75	VCC 31	+9V
S-VIDEO-C
			VCC 47
	49
			VCC 1	+5V
SUB VIDEO	53
		2	LOGIC
		3

JK3901

IC5504 (A/D CONVERTER)

R

P3901-1

P5501-1

FROM

I2C SERIAL DATA 1

57 I2C

26,27,34,35,

G

SYSTEM CONTROL

39,42,45,46,

P3901-3

P5501-3

I2C SERIAL CLOCK 1

56

CONTROL

51,52,59,62

VCC

B

BLOCK DIAGRAM

RGB-IN 2

P3901-5

P5501-5

H-SYNC

11,22,23,

P3901-7

P5501-7

V-SYNC

69,78,79

P3901-9

P5501-9

IC5501 (SW)

VCC

+3.3V

TP5501

1

H

Q5507

A/D

R

B

L

21

54

70-77

7

CONVERTER

TP5502

3

H

Q5508

A/D

G

L

19

B

48

2-9

9

CONVERTER

5

H

Q5509

A/D

B

B

L

15

43

12-19

11

CONVERTER

TP7101

	JK3502	Q3501
S-VIDEO	C	Q3502
	Y	B
OUT		B
		Q3503
VIDEO OUT		B

	34	I2C SERIAL DATA	FROM
LOGIC			SYSTEM CONTROL
	33	I2C SERIAL CLOCK
37			BLOCK DIAGRAM
39
41
	VCC 42	SW +9V

				TP5503			A/D H-SYNC 66
							A/D CLOCK 67
	JK5501						H-SYNC 30
							V-SYNC 31
	R	24	H
			L	22			TP5504	TP5505
	G	23
					IC5502 (SYNC SEPARATION)
RGB-IN 1	B
	H-SYNC
	V-SYNC	12	H		4
			L	14
		13
							Q5510
						SYNC
					6		13
	+5V	20 VCC				SEPARATION
				16
					8		14
	RGB1(H)RGB2(L)			+5V	16	VCC
	<FROM IC6003(22)>

VIDEO SIGNAL PATH I BLOCK DIAGRAM (1/2) PT-50LC13