JVC KD-SH99R VDD1, Dreq, Dresp, IOP7, IOP6, IOP5, IOP4, IOP3, IOP2, IOP1, IOP0, Hdbdir Dvdd, Tso

			KD-SH99R
			UPD63711AGC(2/3)
Pin No.	Symbol	I/O	Function
33	IO11	I	LRCK signal input terminal to building DAC into.
34	IO12	O	Signal which distinguishes left channel/right channel of voice data output
			from DOUT.
35	IO13	O	Terminal (88.2kHz)(WDCK)of the output of the frequency signal twice
			defect detection output terminal(HOLD) LRCK HOLD/WDCK can be
			switched with the microcomputer.
36	VSSO	O	Terminal of output of data of Digital audio interface.
37	VDD1	-	It is GND of the logic circuit.
38	IO14	O	Buffer ring output terminal of oscillation.
39	IO15	I	The state of this terminal is output to Bit5 of the status output.
40	DREQ	-	Positive power supply supply terminal to logic circuit.
41	DRESP	O	It is EFM-synchronous detection signal.becomes high-level when the
42	IOP7	O	output of the synchronous pattern detection signal and the frame
			counter is corresponding by the EFM recovery part, and becomes a row
			level at the disagreement.
43	IOP6	O	Mirror output terminal. (MIRR).It is a frame synchronous signal of PLL
			system. The one that a basic frequency (44.1kHz)of the reading signal
			obtained in PLL system was divided makes almost equally to the
			synchronization(7.35kHz) of one frame. (WFCK)MIRR/WFCK can be
			switched with the microcomputer.
44	IOP5	O	the terminal for the monitor of the bit clock. When PLL is locked, the
			go down edge of the EFM signal and this signal locks.
45	IOP4	-	it is GND of the logic circuit.
46	IOP3	O	The output terminal which shows the C1 error correction result. Even
47	IOP2		go down of RFCK is fixed.
48	IOP1	O	It is an output terminal which shows the C2 error correction result. Even
49	IOP0		of RFCK is fixed.
50	HDBDIR
51	DVDD	-	Positive power supply supply terminal to logic circuit.
52	PACK	O	It is PACK synchronous signal shows the head of packing.
53	TSO	O	It is a cereal output terminal of the CD-TEXT data.
54	TSI	I	It is a serial input terminal of the CD-TEXT control parameter.
55	TSCK_B	I	Cereal clock input terminal of CD-TEXT.
56	TSTB_B	I	Terminal of input of parameter strove signal of CD-TEXT.
57	DGND	-	It is GND of the logic circuit.
58	TEST0	I	It is a test terminal. Please connect with GND usually.
59	TEST1
60	ATEST	O	It is a test terminal. Please make to the opening usually.
61	AGND	-	It is GND of an analog circuit.
62	FD	O	Focus drive output terminal.
63	TD	O	Tracking drive output terminal.
64	SD	O	Thread drive output terminal.
65	MD	O	Spindle drive output terminal.
66	DACO	O	It is DAC output terminal for the adjustment. A set value of CRAM7FH is
			output.
67	FBAL	O	It is DAC output terminal for the adjustment. A set value of CRAM7CH is
			output (built-in RF FE amplifier offeset).
68	TBAL	O	It is DAC output terminal for the adjustment. A set value of CRAM7DH is
			output.
69	TEVCA	O	It is DAC output terminal for the adjustment. A set value of CRAM7EH is
			output (built-in RF TE amplifier offset).
70	AVDD	-	It is a positive power supply supply terminal to an analog circuit.
71	EFM	O	EFM signal output terminal.
72	ASY	I	It is a standard voltage input terminal of the EFM comparator.
73	C3T	-	Capacitor connection terminal for 3T detection.
74	RFI	I	RF signal input terminal for EFM data generation.
75	AGCO	O	RF signal output terminal after gain is adjusted.
76	AGCI	I	Input terminal of RF-AGC amplifier.
77	RFO	O	Output terminal of RF saming amplifier.

1-25