4-5 PORT ALLOCATIONS
4-5-1 CPU (IC8)
Pin | Port | Description |
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1 | VIN | Input port for battely voltage detection. | ||||
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9 | RESET | Input port for RESET signal. |
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11 | CSIFT | Outputs reference | oscillator | for | the | |
CPU control signal. |
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12 | SCK | Outputs clock signal to the | PLL | IC | ||
(IC1), EEPROM (IC7), etc. |
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| • Outputs strobe | signals | to | the | |
15 | DAST | expander IC (IC10, pin 6). |
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• Input port for the initial version sig- | ||||||
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16 | CLIN | Input port for the cloning signal. |
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17 | CLOUT | Outputs the cloning signal. |
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18 | PLST | Outputs strobe signals to the PLL IC | ||||
(IC1, pin 3). |
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19 | NOIS | Input for for noise signals (pulse type). | ||||
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21 | BUSY | Outputs BUSY detection. |
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Low: The channel is busy. |
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OPV3– | Input port for the optional unit detec- | |||||
OPV1 | tion signal from J5. |
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KR3– | Output ports for key matrix. |
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KR0 | Low: When the key is pushed. |
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| • Outputs RX mute control signal. |
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49 | RMUT | • Input port for the RX mute signal | ||||
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| • Output TX mute control signal. |
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50 | MMUT | • Input port for the TX mute signal | ||||
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51 | DUSE | cy control signal when DTCS is acti- | ||||
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52 | S5C | Outputs S5 regulator control signal. | ||||
Low: While power is ON. |
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53 | R5C | Outputs R5 regulator control signal. | ||||
Low: While receiving. |
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54 | T5C | Outputs T5 regulator control signal. | ||||
Low: While transmitting. |
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55 | TXC | Outputs APC circuit control signal. |
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High: While transmitting. |
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| Outputs control signal for the regulator | ||||
56 | AFON | circuit of AF power amplifier. |
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| High: When squelch is open, etc. |
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57 | LIGT | Outputs LCD backlight control signal. | ||||
High: Lights ON. |
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58 | ESCK | Outputs EEPROM (IC7, pin 6) clock | ||||
signal. |
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59 | ESDA | I/O port for data signals from/to EEP- | ||||
ROM (IC7, pin 5) |
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CPU
Pin | Port | Description | |
number | name | ||
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| Input port for unlock signal. | |
63 | UNLK | High: PLL is unlocked. | |
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| Low: PLL is locked. | |
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90 | MTONE | Beep audio while receiving. | |
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91 | DTMF | Outputs DTMF tone signal while trans- | |
mitting. | |||
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94 | CTCIN | CTCSS/DTCS signals input port for | |
decording. | |||
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95 | PTT0 | Input port for the [PTT] switch. | |
High: While [PTT] switch is pushed. | |||
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96 | BDET | Input port for the battery’s type detec- | |
tion. | |||
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97 | REM0 | Input port for the | |
from external MIC | |||
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98 | SD | Input port for the RSSI detection. | |
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99 | LVIN | Input port for the PLL lock voltage. | |
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100 | TEMP | Input port for the transceiver’s internal | |
temperature detection. | |||
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4-5-2 OUTPUT EXPANDER IC (IC10)
Pin | Port | Description | |
number | name | ||
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2, 3, | Output tunable bandpass filter control | ||
10, 11 | signals. | ||
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6 | DAST | Input port for strobe signal from the | |
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7 | SCK | Input port for clock signal from the | |
CPU (IC8, pin 12). | |||
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