Icom IC-4008MKII service manual Transmitter Circuits, PLL Circuits RF Unit

4-1-6 SQUELCH CIRCUIT (RF AND MAIN UNITS)

(1) NOISE SQUELCH

The noise squelch circuit cuts out AF signals when no RF sig- nals are received. By detecting noise components in the AF signals, the squelch circuit switches the AF mute switch.

A portion of the AF signals from the FM IF IC (RF unit; IC2, pin 9) are applied to the active filter section (RF unit; IC2, pin 8). The active filter section amplifies and filters noise compo- nents. The filtered signals are applied to the noise detector section and output from pin 14 as the “SQL” signal.

The “SQL” signal from IC2 (pin 14) passes through J2 pin 9, and is then applied to the CPU (MAIN unit; IC1, pin 59). The CPU analyzes the noise condition and outputs the “RMUT” and “AFON” signals to toggle the volume mute (MAIN unit; Q23) and AF mute (MAIN unit; Q5, Q10, Q11) switches.

(2) TONE SQUELCH

The tone squelch circuit detects AF signals and opens the squelch only when receiving a signal containing a matching subaudible tone (CTCSS). When tone squelch is in use, and a signal with a mismatched or no subaudible tone is received, the tone squelch circuit mutes the AF signals even when noise squelch is open.

A portion of the AF signals from the FM IF IC (RF unit; IC2, pin 9) passes through the tone low-pass filter (MAIN unit; Q7, Q12) to remove AF (voice) signals and is applied to the CTCSS decoder inside the CPU (MAIN unit; IC1, pin 58) via the “CTCIN” line to control the volume mute and AF mute switches.

4-2 TRANSMITTER CIRCUITS

4-2-1 MICROPHONE AMPLIFIER CIRCUIT (MAIN UNIT)

AF signals from the internal/external microphone are applied to the microphone amplifier circuit (IC2b) via the microphone switch (Q6). The amplified signals are passed through the low-pass filter (IC2a) and applied to the modulation circuit in the RF unit via J4 pin 5 as the MOD signal.

4-2-3 DRIVE/POWER AMPLIFIER CIRCUITS (RF UNIT)

The amplifier circuit amplifies the VCO oscillating signal to the output power level.

The amplified transmit signal is passed through the antenna switching circuit (D6) and low-pass filter, and is then applied to the antenna.

The modulated transmit signal is amplified at the pre-drive and drive amplifiers (Q8, Q201) after being amplified at the buffer amplifier (Q7). The amplified signal is power amplified at the power amplifier (Q202) to obtain 500 mW or (IC–4008A) 10 mW (IC–4008MK2) of RF power.

The power amplified signal is then applied to the antenna via the low-pass filter circuits.

4-3 PLL CIRCUITS (RF UNIT)

A PLL circuit provides stable oscillation of the transmit fre- quency and receive 1st LO frequency. The PLL output com- pares the phase of the divided VCO frequency to the refer- ence frequency. The PLL output frequency is controlled by the divided ratio (N-data) of a programmable divider.

The PLL circuit consists of the VCO circuit (Q6, D4, D5). An oscillated signal from the VCO passes through the buffer amplifier (Q7) is applied to the PLL IC (IC1, pin16) and is prescaled in the PLL IC based on the divided ratio (N-data). The reference signal is generated at the reference oscillator (X1) and is also applied to the PLL IC. The PLL IC detects the out-of-step phase using the reference frequency and outputs it from pin 14. The output signal is passed through the loop filter (R45, C68) and is then applied to the VCO circuit as the lock voltage.

If the oscillated signal drifts, its phase changes from that of the reference frequency, causing a lock voltage change to compensate for the drift in the oscillated frequency.

4-2-2 MODULATION CIRCUIT (RF UNIT)

The filtered audio signals from J4, pin 5 (On the MAIN unit) are passed through the deviation adjustment pot (R50) then applied to the modulation circuit (D4, D5) to modulate trans- mit signals at the VCO circuit (Q6).

The modulated signal is applied to the drive amplifier circuit.

• PLL circuit

VCO Buffer

Q7

D2 to transmitter circuit

D1 to 1st mixer circuit

Loop	Q6, D4, D5				IC1 (PLL IC)
filter
	14	Phase	Programmable		Prescaler	16
to the FM IF IC		detector	counter
(IC2, pin 1)	9					6
X1	11	Programmable					CK
				Shift register		7
							DATA
21.25 MHz		divider				8
							STB

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