Operational Modes: Trigger Approach Timing Diagram
The Trigger Approach can be used in applications where synchronization of the position data to an event is required. Often, this mode is used when a fixed latency between a clock signal and the sampled position data is required. The customer can choose this mode of operation by using the optional SmartPrecision Software. In this mode, triggering is controlled by the n_spiEnable signal.
The falling edge of n_spiEnable signal starts the process by immediately resetting the internal calculators and acquiring the latest A/D converter information. Old data in the calculation chain is discarded and the initiation of a new position calculation is started. The new data is ready in 1420ns. The n_spiEnable signal for retrieving the data must be asserted within 210ns after the new data is ready or the triggered acquisition will be over written by new data.
Shifting the data out of the interpolator's serial port is accomplished exactly as in the Standard Communication mode of operation. In order to sample the next position, n_spiEnable must be brought high and then reasserted. See the Trigger Approach timing dia- gram below.
Trigger Approach Timing Diagram
tW
tCS
n_spiEnable
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| tCSC |
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| spiClock |
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tCCS
Clk36
LSB
Trigger Approach Timing Diagram
| Symbol | Parameter | Minimum | Typical | Maximum | Units |
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| tspiH | spiClock High Time | 50 |
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| tspiL | spiClock Low Time | 50 |
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| tTDR | n_spiEndable to DataReady | 1420 |
| 1600 | ns |
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| tW | n_spiEnable Low for trigger | 50 |
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| tCSC | n_spiEnable to spiClock | 0 |
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| tCSD | n_spiEnable to DataValid |
| 80 |
| ns |
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| tV | spiClock to Data Valid |
| 80 |
| ns |
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| tCCS | spiClock to n_spiEnable | 0 |
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| tCS | n_spiEnable High | 50 |
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Page 23