NW-A805/A806/A808/NWZ-A815/A816/A818
Pin No. | Pin Name | I/O |
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U24 | C_TCK | I | Clock signal input terminal for JTAG | Not used | |
U25 | VPLL | O | Power supply voltage output terminal |
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U26 | CKI | I | Main system clock input terminal (11.2896MHz) | ||
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V1 to V3 | IO_A | - | Not used |
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V4, V5, | SDR_A6, SDR_A5, | O | Address signal output to the 256Mbit | ||
V8 | SDR_A7 | ||||
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V9 | GND | - | Ground terminal |
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V10 | CHG_XCHGEN | O | Charge enable signal output to the charge control | ||
V11 | NC | - | Not used |
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V12 to | GND | - | Ground terminal |
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V15 |
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V16 | DSP_DET | - | Not used |
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V17 | LCD_BLTCTL | O | Control signal output to the LCD back light driver | ||
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V18, V19 | NC | - | Not used |
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V22 | C_RTCK | I | Clock signal input terminal for JTAG | Not used | |
V23 | C_TRSTZ | I | Reset signal input terminal for JTAG | Not used | |
V24 | VPLLIN | I | Power supply voltage input terminal |
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V25 | VDSPIN | I | Power supply voltage input terminal |
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V26 | VDSP | - | Not used |
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W1 | IOGND | - | Ground terminal |
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W2 | LCD_PCI | O | PCI signal output to the liquid crystal display | ||
W3 | LCD_PON | O | PON signal output to the liquid crystal display | ||
W4, W5 | SDR_A4, SDR_A3 | O | Address signal output to the 256Mbit | ||
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W8 | CHG_PEN2 | O | Charge enable signal output to the charge control | ||
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W9 | GND | - | Ground terminal |
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W10 | NC | - | Not used |
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W11 to | GND | - | Ground terminal |
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W18 |
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W19 | WR_ERR | - | Not used |
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W22 | NC | - | Not used |
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W23 | C_TDI | I | Data input terminal for JTAG Not used | ||
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W24, W25 | IO_B | - | Not used |
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W26 | VLO | O | Power supply voltage output terminal |
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Y1 | IOVDD | - | Power supply terminal |
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Y2 | CHG_ICTL | O | Charge on/off control signal output to the charge control | ||
Y3 | HP_XMUTE | O | Analog muting on/off control signal output terminal | ||
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Y4, Y5 | SDR_A2, SDR_A1 | O | Address signal output to the 256Mbit | ||
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Y22, Y23 | TM1, TM0 | - | Not used |
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Y24, Y25 | VDD_DSP | - | Power supply terminal |
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Y26 | VHP | O | Power supply voltage output terminal |
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AA1 | CRD_LINEOUT | O | Selection signal output to the headphone/line selecter | ||
AA2 | WAKEUP_INT | I | Wake up signal input terminal |
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AA3 | GPIO9 | - | Not used |
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AA4 | SDR_A0 | O | Address signal output to the 256Mbit | ||
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AA5 | SDR_CLK | O | Clock signal output to the 256Mbit | ||
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AA22, | GND | - | Ground terminal |
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AA23 |
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AA24 | TM2 | - | Not used |
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