HP 8100 manual PCI Express Bus Operation, Software/Driver Layer, Transaction Protocol Layer

Page 37

System Support

The PCI bus supports a bus master/target arbitration scheme. A bus master is a device that has been granted control of the bus for the purpose of initiating a transaction. A target is a device that is the recipient of a transaction. The Request (REQ), Grant (GNT), and FRAME signals are used by PCI bus masters for gaining access to the PCI bus. When a PCI device needs access to the PCI bus (and does not already own it), the PCI device asserts its REQn signal to the PCI bus arbiter (a function of the system controller component). If the bus is available, the arbiter asserts the GNTn signal to the requesting device, which then asserts FRAME and conducts the address phase of the transaction with a target. If the PCI device already owns the bus, a request is not needed and the device can simply assert FRAME and conduct the transaction. Table 4-2 shows the grant and request signals assignments for the devices on the PCI bus.

Table 4-2.

PCI Bus Mastering Devices

Device

REQ/GNT Line

Note

 

 

 

PCI Connector Slot 1

REQ0/GNT0

 

 

 

 

PCI Connector Slot 2

REQ1/GNT1

[1]

 

 

 

PCI Connector Slot 3

REQ2/GNT2

[1]

 

 

 

NOTE:

[1] CMT form factor only

PCI bus arbitration is based on a round-robin scheme that complies with the fairness algorithm specified by the PCI specification. The bus parking policy allows for the current PCI bus owner (excepting the PCI/ISA bridge) to maintain ownership of the bus as long as no request is asserted by another agent. Note that most CPU-to-DRAM accesses can occur concurrently with PCI traffic, therefore reducing the need for the Host/PCI bridge to compete for PCI bus ownership.

4.2.2 PCI Express Bus Operation

The PCI Express (PCIe) v1.1 bus is a high-performace extension of the legacy PCI bus specification. The PCIe bus uses the following layers:

■Software/driver layer

■Transaction protocol layer

■Link layer

■Physical layer

Software/Driver Layer

The PCIe bus maintains software compatibility with PCI 2.3 and earlier versions so that there is no impact on existing operating systems and drivers. During system intialization, the PCIe bus uses the same methods of device discovery and resource allocation that legacy PCI-based operating systems and drivers are designed to use.

Transaction Protocol Layer

The transaction protocol layer processes read and write requests from the software/driver layer and generates request packets for the link layer. Each packet includes an identifier allowing any required responcse packets to be directed to the originator.

 

Technical Reference Guide

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Contents February Technical Reference GuideTechnical Reference Guide Contents System Support Processor/Memory SubsystemInput/Output Interfaces Integrated Graphics Subsystem Power and Signal DistributionError Messages and Codes Index System BiosAbout this Guide IntroductionAdditional Information Sources Online ViewingNotational Conventions Serial NumberSpecial Notices ValuesAcronyms and Abbreviations Common Acronyms and AbbreviationsAcronym or Abbreviation Description CDS Eisa IPL Nvram Sdram Uart Introduction Introduction System OverviewFeatures SFF CMT Feature Differences by Form FactorArchitectural Differences by Form Factor System ArchitectureFunction HP Compaq 8100 Elite Business PC Architecture, Block diagram Chipset Intel Processor SupportSystem Memory Support ComponentsSupport Component Functions Component Name FunctionSerial Interface Mass StorageUniversal Serial Bus Interface Network Interface ControllerAudio Subsystem Graphics SubsystemIntel Integrated Graphics Controller Statistics Intel Core i5-661 ProcessorEnvironmental Specifications Factory Configuration SpecificationsHP ProtectTools Embedded Security Parameter Operating Non-operatingPhysical Specifications Power Supply Electrical SpecificationsParameter Value Parameter SFF CMTSystem Overview Processor/Memory Subsystem Architecture Processor/Memory SubsystemIntel Processor Intel Processor FeaturesSupported Processors Processor Changing/UpgradingMemory Subsystem Memory Mapping and Pre-allocation Memory UpgradingMemory Socket Loading Channel a Channel B Socket TotalSystem Memory Map for maximum of 8 gigabytes PCI Bus Overview System SupportPCI 2.3 Bus Operation PCI Component Function # Device # Wired to PCI Component Configuration Access PCI BusSoftware/Driver Layer PCI Express Bus OperationTransaction Protocol Layer PCI Bus Mastering DevicesOption ROM Mapping PCI Power Management SupportPCI Interrupts Link LayerPCI 2.3 Connector PCI ConnectorsPCI 2.3 Bus Connector Pinout PCIe Bus Connector Pinout PCIe ConnectorsSystem Resources Apic ModeInterrupts ModePCI Interrupt Distribution Direct Memory AccessClearing Cmos Real-Time Clock and Configuration MemorySystem Management Configuration Memory Cmos MapStandard Cmos Locations Security FunctionsSetup Password Power-On / Setup PasswordCable Lock Provision Interface SecuritySmart Cover Lock Optional Power ManagementAcpi Wake-Up Events Acpi Wake-Up Event System Wakes FromSystem Status System Status PowerLED Beeps Action RequiredSystem Operational Status LED Indications Thermal Sensing and Cooling Register Map and Miscellaneous FunctionsSystem I/O Map Port Function System I/O MapPCH-DO Functions Gpio FunctionsSIO Controller Functions Input/Output Interfaces SATA/eSATA Interfaces Pin Sata Connector PinoutSata interface Pin DescriptionESATA interface Optional eSATA Bracket/Cable AssemblyPin Signal Description DB-9 Serial Connector PinoutSerial Interface Enhanced Parallel Port Mode Standard Parallel Port ModeExtended Capabilities Port Mode Parallel Interface SupportDB-25 Parallel Connector Pinout Parallel Interface ConnectorPin Signal Function Keyboard Interface Operation Keyboard/Pointing Device InterfaceKeyboard/Pointing Device Connector Pinout Keyboard/Pointing Device Interface ConnectorPointing Device Interface Operation Universal Serial Bus Interface USB Signals USB Connector Location all form factorsPCH USB Port Mapping USB Connector Pinout USB ConnectorUSB Cable Data USB Cable Length DataAudio Subsystem Audio Subsystem Functional Block DiagramHD Audio Link Bus HD Audio ControllerAudio Multistreaming HD Audio Subsystem Specifications Audio SpecificationsParameter Measurement 10. LAN LED Indications Network Interface ControllerFunction Activity LED Speed LED Wake-On-LAN Support Power Management SupportAlert Standard Format Support NIC Specifications NIC Connector11. NIC Specifications Parameter Compatibility standard orprotocolIntegrated Graphics Subsystem Functional Description Integrated Graphics Subsystem, Block diagramSystem Available Installed Setting Memory Graphics Memory System Memory Installed Pre-allocatedAvailable Total Shared System Memory Resolution Analog Digital Integrated Graphics Controller Supported ResolutionsMaximum Refresh Rate Upgrading Analog Monitor Connector Monitor ConnectorsDB-15 Monitor Connector Pinout Pin Signal DisplayPort ConnectorIntegrated Graphics Subsystem Power Distribution Power and Signal DistributionCMT 320-Watt Power Supply Unit Specifications SFF 240-Watt Power Supply Unit SpecificationsPower Button Power ControlPower Button Actions Pressed Power Button ResultsPower LED Indications Condition Wake Up Events Power ManagementPower Transition OS Restart System Power StatesState System Condition Consumption To S0 by RequiredCR1 +5 VDC LED Signal DistributionXBT1 System Board Connector, Indicator, and Switch DesignationsSystem Bios Upgrading ROM FlashingChangeable Splash Screen Boot Device Order Boot FunctionsNetwork Boot F12 Support Memory Detection and ConfigurationBoot Error Codes Boot Error CodesVisual power LED Audible speaker Meaning Client Management Functions Function ModeClient Management Functions INT15 System ID and ROM Type Temperature StatusSystem ID Numbers System Form Factor System IDType Data Smbios FunctionsManagement Engine Functions USB Legacy SupportBeep/Power LED Codes Error Messages and CodesTable A-1 Beep/Power LED Codes Beeps Power LED Probable CausePower-On Self Test Post Messages Table A-2 Error Messages and Codes Table A-3 System Error Messages Probable Cause System Error MessagesMemory Error Messages Memory Error MessagesTable A-4 Message Probable CauseTable A-5 Keyboard Error Messages Probable Cause Keyboard Error MessagesVideo Graphics Error Messages Printer Error MessagesTable A-6 Printer Error Messages Probable Cause Table A-7 Video Graphics Error Messages Probable CauseTable A-8 Diskette Drive Error Messages Probable Cause Diskette Drive Error MessagesTable A-9 Serial Interface Error Messages Probable Cause Serial Interface Error MessagesModem Communications Error Messages System Status Error Messages System Status Error MessagesTable A-11 Table A-12 Hard Drive Error Messages Probable Cause Hard Drive Error MessagesXx = 03, Hard drive read/write compare test Table A-13 Hard Drive Error Messages Probable Cause Table A-14 Video Graphics Error Messages Probable Cause Audio Error MessagesTable A-15 Audio Error Messages Probable Cause Network Interface Error Messages 17 DVD/CD-ROM Error MessagesDVD/CD-ROM Error Messages Table A-17 Network Interface Error Messages Probable CauseTable A-18 Scsi Interface Error Messages Scsi Interface Error Messages 65xx-xx, 66xx-xxPointing Device Interface Error Messages 8601-xx Error Messages and Codes Numerics IndexIndex
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