AMD 6 manual Single Step Across I/O SMI Skips One Debug Trap, Preliminary Information

Preliminary Information

24332E— December 2002 AMD Athlon™ Processor Model 6 Revision Guide

24 Single Step Across I/O SMI Skips One Debug Trap

Products Affected. A0, A2, A5

Normal Specified Operation. When single stepping (with EFLAGS.TF) across an IN or OUT instruction that detects an SMI, the processor correctly defers taking the debug trap and instead enters SMM. Upon RSM (without I/O restart), the processor should immediately enter the debug trap handler.

Non-conformance.Under this scenario, the processor does not enter the debug trap handler but instead returns to the instruction following the I/O instruction.

Potential Effect on System. When using the single step debug mode, following an I/O operation that detects an SMI, one instruction may appear to be skipped.

Suggested Workaround. None required as this is a debug limitation only. If a workaround is desired, modify the SMM handler to detect this case and enter the debug handler directly.

Resolution Status. No fix planned.

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