Implementation5, Clocking, Scratchpad Initialization

Implementation	32430C

Implementation5

5.1Implementation

The following is a collection of implementation details to consider in the GeodeROM implementation phase.

5.1.1Clocking

There are two clock inputs to the GX processor: the system PCI clock (SYSREF) used to derive the Core clock, and the GeodeLink™ clock used for the memory clock. The Dot clock is used for video display control. The Core and GeodeLink clocks can be programmed and restarted by reseting the GX processor.

5.1.2Scratchpad Initialization

The scratchpad is no longer needed either for BLT buffers or by the audio code for variable storage. The scratchpad is not supported in the GX processor CPU Core.

5.1.3Post Codes

Post codes are sent out to port 80 throughout GeodeROM. A Post codes list is available in the AMD Geode™ GeodeROM Functional Specification (publication ID 32087) to help users debug their problems.

AMD Geode™ GX Processor/CS5535 Companion Device GeodeROM Porting Guide

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AMD CS5535 manual Implementation5, Clocking, Scratchpad Initialization, Post Codes

Contents

Publication ID 32430C April Trademarks Advanced Micro Devices, Inc. All rights reserved Contents Contents GeodeLink Architecture Topology List of Figures List of Figures List of Tables List of Tables Introduction Overview1 Assumption Write the value in Edxeax to MSR specified by ECX Model Specific Registers2Example MSR Transaction Load MSR specified by ECX into Edxeax Model Specific Registers CS5535 Companion Device GeodeLink Architecture3AMD Geode GX Processor Memory Descriptor Types GeodeLink MSR AddressingDescriptors Addressing Example Mdiv Vdiv Set Clocks and ResetProcessor Initialization Sysref Calculating Processor Speed Memory Controller InitializationCPU Identification Test Extended Dram GeodeLink Modules InitializationSize Memory Default Region Configuration Properties Bit Descriptions Glpci Regions Descriptor AllocationDescriptor MSR Address Gliu Initialization AMD Geode CS5535 Companion Device InitializationChipset ID Set ID Select Idsel System Management Bus SMBus Multi Function General Purpose Timers MFGPTsIRQ Mapper Keyboard Emulation Logic KEL 1+ Other Legacy DD Initialization Power Management LogicAcpi Flash Interface 7 AC97 Audio Controller Initialization Diverse Device I/O LocationsATA-5 / Hard Drive Initialization Universal Serial Bus USB Allocate Processor Frame Buffer and VSA2 Memory Virtual System Architecture InitializationPCI Bus Initialization GeodeLink Control Processor Initialization Dual Monitor Support Miscellaneous InitializationsInitialize Graphics Subsystem Monochrome Support 32430C Post Codes Implementation5Clocking Scratchpad Initialization Implementation Setup Options6 32430C Memory7Map ROMVSA Memory Mapped Frame BufferVSA PCI GeodeROM Flow GX Processor/CS5535 Device VSA Initial release Document Revision HistoryTable A-1. Revision History Revision # Revisions / Comments