Asus M2NC61P DRAM Timing Configuration, SouthBridge Configuration

DRAM Timing Configuration

The DRAM Timing configuration menu allows you to change the DRAM Timing settings.

DRAM Timing Configuration		DRAM ECC allows
Memory Clock Mode	[Auto]	hardware to report
		and correct memory
		errors automatically
		maintaining system
		integrity.

Memory Clock Mode [Auto]

Allows you to set the memory clock mode. Configuration options: [Auto] [Limit] [Manual]

The following item shows when the Memory Clock Mode is set to [Limit] or [Manual]

Memclock Value [200 MHz]

Allows you to set the memory clock value. Configuration options: [200 MHz] [266 MHz] [333 MHz] [400 MHz] [533 MHz]

SouthBridge Configuration

SouthBridge MCP61 Chipset Configuration

Primary Graphics Adapter	[PCIE -> PCI -> IGP]
OnChip VGA Frame Buffer Size	[128MB]
AZALIA AUDIO	[Auto]
Front Panel Select	[HD Audio]
OnBoard LAN	[Auto]
OnBoard LAN Boot ROM	[Disabled]
MCP61 ACPI HPET TABLE	[Enabled]

Primary Graphics Adapter [PCI -> PCI -> IGP ]

Allows you to set the display devices priority.

Configuration options: [PCI -> PCI -> IGP] [IGP -> PCI -> PCIE]

OnChip VGA Frame Buffer Size [128MB]

Allows you to set the MCP61 share memory size. Configuration options: [16MB] [32MB] [64MB] [128MB] [256MB]

ASUS V-Series M2NC61P 5-23