Atmel AT91CAP7E manual AT91cap7E

CAPTM CUSTOMIZABLE MICROCONTROLLERS

AT91cap7E

AT91CAP7E is an ARM7™-based MCU with a direct FPGA interface, six-layer advanced high-speed bus (AHB), peripheral DMA controller and 160 Kbytes of on-chip SRAM. It offers seamless migration to AT91CAP7 customizable MCUs for ARM7-plus-FPGA designs. It includes on-chip peripherals such as USB 2.0 full speed device, SPI master and slave, two USARTs, three 16-bit timer counters, an 8-channel/ 10-bit analog to digital converter, plus a full-functioned system controller including interrupt and power control and supervisory functions.

The FPGA interface on the AT91CAP7E provides the FPGA with direct access to the AT91CAP7E’s on-chip AHB and peripheral DMA controller. This architecture eliminates FPGA-induced bus contention, off-loads MCU-to-FPGA communications from the CPU, and frees up the external bus interface for external memory access.

Interfacing an ARM7-based MCU to an FPGA has traditionally been done through the external bus interface (EBI) or programmable I/O. Either arrangement requires that the CPU transfer data to and from

System Controller JTAG

Main	PLL	ICE
OSC	PLL

PMC WDT

AIC	PIT	ARM7TDMI
32K OSC	RTT
RC OSC	POR

SHWDC	GPBREG
	POR

SRAM SRAM 96KB 64KB

EBI

FPGA Interface	Static Mem.
	CF
	NAND Flash
	SDRAM

		6 -layer AHB Matrix
AT91CAP7E
	ROM (256KB)	AMBA Bridge	Peripheral DMA
			Controller

APB

USB

FS

Device

SPI	PIO	Timer	USART	USART	ADC
	x32	x3

the FPGA one word-at-a-time, basically stealing CPU cycles that should be conserved for processing and limiting access to external memory during FPGA operations.

The FPGA interface on Atmel’s AT91CAP7E provides the FPGA with two AHB masters, four AHB slaves, a special direct AHB slave interface to an external RAM through the FPGA, and a programmable ROM that remaps the external RAM to emulate and debug the ROM code. Fourteen advanced peripheral bus (APB) slaves, two full-duplex DMA channels and 32-bit programmable I/O may be hardware selected to share I/O. An on-chip priority interrupt controller provides up to 13 encoded interrupts and two additional un-encoded interrupts for DMA transfers.