Atmel AT91SAM7L-STK Section 3 Board Description

AT91SAM7L-STK Rev. A Starter Kit User Guide 3-1

6409A–ATARM–30-Jun-08

Section 3Board Description

•Incorporates the ARM7TDMI® ARM® Thumb® Processor

– High-performance 32-bit RISC Architecture

– High-density 16-bit Instruction Set

– Leader in MIPS/Watt

– EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support

•Internal High-speed Flash

– 128 Kbytes (AT91SAM7L128), Organized in 512 Pages of 256 Bytes Single Plane

– 64 Kbytes (AT91SAM7L64), Organized In 256 Pages of 256 Bytes Single Plane

– Single Cycle Access at Up to 15 MHz in Worst Case Conditions

– 128-bit Read Access

– Page Programming Time: 4.6 ms, Including Page Auto Erase, Full Erase Time: 10 ms

– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit

– Fast Flash Programming Interface for High Volume Production

•Enhanced Embedded Flash Controller (EEFC)

– Interface of the Flash Block with the 32-bit Internal Bus

– Increases Performance in ARM and Thumb Mode with 128-bit Wide Memory Interface

•Internal High-speed SRAM, Single-cycle Access at Maximum Speed

– 6 kbytes

• 2 Kbytes Directly on Main Supply that Can Be Used as Backup SRAM

• 4 Kbytes in the Core

•Memory Controller (MC)

– Enhanced Embedded Flash Controller, Abort Status and Misalignment Detection

•Reset Controller (RSTC)

– Based on Brownout Reset and Low-power Factory-calibrated Brownout Detector

– Provides External Reset Signal Shaping and Reset Source Status

•Clock Generator (CKGR)

– Low-power 32 kHz RC Oscillator, 32 kHz On-chip Oscillator, 2 MHz Fast RC Oscillator and one PLL

•Supply Controller (SUPC)

– Minimizes Device Power Consumption

– Manages the Different Supplies On Chip

– Supports Multiple Wake-up Sources

•Power Management Controller (PMC)

– Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode

– Three Programmable External Clock Signals

– Handles Fast Start Up

•Advanced Interrupt Controller (AIC)

– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources

– Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected