Compaq EN Series LIST OF FIGURES

Technical Reference Guide
Compaq Deskpro EN Series of Personal Computers
Desktop and Minitower Form Factors
Third Edition–- September1998
viii
LIST OF FIGURES
FIGURE 2–1. COMPAQ DESKPRO EN PERSONAL COMPUTER WITH MONITOR........................................... 2-1
FIGURE 2–2. CABINET LAYOUTS, FRONT VIEW......................................................................................2-4
FIGURE 2–3. CABINET LAYOUTS, REAR VIEW........................................................................................2-5
FIGURE 2–4. DESKTOP CHASSIS LAYOUT, TOP VIEW..............................................................................2-6
FIGURE 2–5. MINITOWER CHASSIS LAYOUT, LEFT SIDE VIEW................................................................2-7
FIGURE 2–6. SYSTEM BOARD CONNECTOR AND SWITCH LOCATIONS......................................................2-8
FIGURE 2–7. BACKLPANE BOARD CONNECTOR, HEADER, AND SWITCH LOCATIONS................................ 2-9
FIGURE 2–8. SYSTEM ARCHITECTURE, BLOCK DIAGRAM......................................................................2-11
FIGURE 2–9. PROCESSOR PACKAGE COMPARISON................................................................................ 2-12
FIGURE 3–1. PROCESSOR/MEMORY SUBSYSTEM ARCHITECTURE............................................................ 3-2
FIGURE 3–2. PENTIUM II PROCESSOR INTERNAL ARCHITECTURE............................................................3-3
FIGURE 3–3. CELERON PROCESSOR INTERNAL ARCHITECTURE...............................................................3-4
FIGURE 3–4. SYSTEM MEMORY MAP.....................................................................................................3-8
FIGURE 4–1. PCI BUS DEVICES AND FUNCTIONS....................................................................................4-2
FIGURE 4–2. PCI BUS CONNECTOR (32-BIT TYPE).................................................................................4-3
FIGURE 4–3. TYPE 0 CONFIGURATION CYCLE........................................................................................4-6
FIGURE 4–4. PCI CONFIGURATION SPACE MAP......................................................................................4-7
FIGURE 4–5. AGP 1X DATA TRANSFER (PEAK TRANSFER RATE: 266 MB/S)........................................ 4-12
FIGURE 4–6. AGP 2X DATA TRANSFER (PEAK TRANSFER RATE: 532 MB/S)........................................ 4-13
FIGURE 4–7. AGP BUS CONNECTOR................................................................................................... 4-15
FIGURE 4–8. ISA BUS BLOCK DIAGRAM.............................................................................................4-16
FIGURE 4–9. ISA EXPANSION CONNECTOR.......................................................................................... 4-17
FIGURE 4–10. MASKABLE INTERRUPT PROCESSING, BLOCK DIAGRAM..................................................4-23
FIGURE 4–11. CONFIGURATION MEMORY MAP....................................................................................4-29
FIGURE 5–1. 40-PIN IDE CONNECTOR.................................................................................................. 5-8
FIGURE 5–2. 34-PIN DISKETTE DRIVE CONNECTOR..............................................................................5-13
FIGURE 5–3. SERIAL INTERFACES BLOCK DIAGRAM............................................................................. 5-14
FIGURE 5–4. SERIAL INTERFACE CONNECTOR (MALE DB-9 AS VIEWED FROM REAR OF CHASSIS)...........5-14
FIGURE 5–5. PARALLEL INTERFACE CONNECTOR (FEMALE DB-25 AS VIEWED FROM REAR OF CHASSIS)..5-26
FIGURE 5–6. 8042-TO-KEYBOARD TRANSMISSION OF CODE EDH, TIMING DIAGRAM............................5-27
FIGURE 5–7. KEYBOARD OR POINTING DEVICE INTERFACE CONNECTOR...............................................5-33
FIGURE 5–8. UNIVERSAL SERIAL BUS CONNECTOR (ONE OF TWO AS VIEWED FROM REAR OF CHASSIS).....5-35
FIGURE 6–1. AUDIO SUBSYSTEM BLOCK DIAGRAM................................................................................6-3
FIGURE 6–2. ANALOG SIGNAL SAMPLING/QUANTIZING..........................................................................6-4
FIGURE 6–3. DAC OPERATION............................................................................................................. 6-5
FIGURE 6–4. AUDIO SUBSYSTEM-TO-ISA BUS PCM AUDIO DATA FORMATS / BYTE ORDERING.............. 6-6
FIGURE 6–5. FM SYNTHESIS PATCH......................................................................................................6-7
FIGURE 6–6. AUDIO CAR-TO-ISA BUS FM AUDIO DATA FORMAT..........................................................6-7
FIGURE 7–1. POWER DISTRIBUTION AND CONTROL, BLOCK DIAGRAM....................................................7-1
FIGURE 7–2. POWER CABLE DIAGRAM.................................................................................................. 7-5
FIGURE 7–3. LOW VOLTAGE SUPPLY, BLOCK DIAGRAM.........................................................................7-6
FIGURE 7–4. SIGNAL DISTRIBUTION DIAGRAM.......................................................................................7-7
FIGURE 7–5. BACKPLANE HEADER PINOUTS...........................................................................................7-8