Technical Reference Guide
Compaq Deskpro EN Series of Personal Computers
Desktop and Minitower Form Factors
Third Edition–- September1998
x
LIST OF TABLES
TABLE 1–1. ACRONYMS AND ABBREVIATIONS.......................................................................................1-3
TABLE 2–1. MODEL DIFFERENCES.......................................................................................................2-10
TABLE 2–2. SUPPORT CHIPSETS .......................................................................................................... 2-13
TABLE 2–3. GRAPHICS SUBSYSTEM COMPARISON................................................................................ 2-14
TABLE 2–4. ENVIRONMENTAL SPECIFICATIONS....................................................................................2-15
TABLE 2–5. ELECTRICAL SPECIFICATIONS........................................................................................... 2-15
TABLE 2–6. PHYSICAL SPECIFICATIONS...............................................................................................2-15
TABLE 2–7. DISKETTE DRIVE SPECIFICATIONS.....................................................................................2-16
TABLE 2–8. 24X CD-ROM DRIVE SPECIFICATIONS..............................................................................2-16
TABLE 2–9. HARD DRIVE SPECIFICATIONS...........................................................................................2-17
TABLE 3–1. PROCESSOR COMPARISON...................................................................................................3-3
TABLE 3–2. BUS/CORE SPEED SWITCH SETTINGS...................................................................................3-5
TABLE 3–3. SPD ADDRESS MAP (SDRAM DIMM)...............................................................................3-7
TABLE 3–4. HOST/PCI BRIDGE CONFIGURATION REGISTERS (443BX, FUNCTION 0)...............................3-9
TABLE 4–1. PCI BUS CONNECTOR PINOUT............................................................................................4-3
TABLE 4–2. PCI BUS MASTERING DEVICES...........................................................................................4-4
TABLE 4–3. PCI DEVICE CONFIGURATION ACCESS................................................................................4-6
TABLE 4–4. PCI FUNCTION CONFIGURATION ACCES..............................................................................4-7
TABLE 4–5. PCI DEVICE IDENTIFICATION............................................................................................. 4-8
TABLE 4–6. PCI/ISA BRIDGE CONFIGURATION REGISTERS (82371, FUNCTION 0).................................4-10
TABLE 4–7. PCI/AGP BRIDGE CONFIGURATION REGISTERS (82371, FUNCTION 1)...............................4-14
TABLE 4–8. AGP BUS CONNECTOR PINOUT....................................................................................... 4-15
TABLE 4–9. ISA EXPANSION CONNECTOR PINOUT............................................................................. 4-17
TABLE 4–10. DEFAULT DMA CHANNEL ASSIGNMENTS ....................................................................... 4-20
TABLE 4–11. DMA PAGE REGISTER ADDRESSES................................................................................. 4-21
TABLE 4–12. DMA CONTROLLER REGISTERS......................................................................................4-22
TABLE 4–13. MASKABLE INTERRUPT PRIORITIES AND ASSIGNMENTS.................................................... 4-24
TABLE 4–14. MASKABLE INTERRUPT CONTROL REGISTERS.................................................................. 4-24
TABLE 4–15. INTERVAL TIMER FUNCTIONS ......................................................................................... 4-27
TABLE 4–16. INTERVAL TIMER CONTROL REGISTERS........................................................................... 4-27
TABLE 4–17. CLOCK GENERATION AND DISTRIBUTION........................................................................ 4-28
TABLE 4–18. CONFIGURATION MEMORY (CMOS) MAP.......................................................................4-30
TABLE 4–19. SYSTEM I/O MAP...........................................................................................................4-46
TABLE 4–20. 82371 SOUTH BRIDGE GENERAL PURPOSE INPUT PORT UTILIZATION............................... 4-47
TABLE 4–21. 82371 SOUTH BRIDGE GENERAL PURPOSE OUTPUT PORT UTILIZATION............................ 4-48
TABLE 4–22. 87307 I/O CONTROLLER PNP STANDARD CONTROL REGISTERS...................................... 4-49
TABLE 4–23. SYSTEM MANAGEMENT CONTROL REGISTERS................................................................. 4-51
TABLE 5–1. IDE PCI CONFIGURATION REGISTERS.............................................................................. 5-2
TABLE 5–2. IDE BUS MASTER CONTROL REGISTERS........................................................................... 5-2
TABLE 5–3. IDE ATA CONTROL REGISTERS.......................................................................................5-3
TABLE 5–4. IDE CONTROLLER COMMANDS........................................................................................ 5-6
TABLE 5–5. 40-PIN IDE CONNECTOR PINOUT...................................................................................... 5-8
TABLE 5–6. DISKETTE DRIVE CONTROLLER CONFIGURATION REGISTERS............................................ 5-10
TABLE 5–7. DISKETTE DRIVE CONTROLLER REGISTERS......................................................................5-11
TABLE 5–8. 34-PIN DISKETTE DRIVE CONNECTOR PINOUT..................................................................5-13