Technical Reference Guide
Compaq Deskpro EN Series of Personal Computers
Desktop and Minitower Form Factors
Third Edition - September 1998
4-11
4.3 AGP BUS OVERVIEW
NOTE: This section describes the AGP bus in gener a l . For a detailed description of
AGP bus operations refer to the AGP Interface Specification available at the following
AGP forum web site: http://www. agpforum. org/in dex.htm
The Accelerated Graph i cs Por t (AGP) bus is specifically designed as an economical yet high-
performance interface for 3D graph ics adapters. The AGP inter face is desi g n ed to give graphics
adapters dedicated pipelined access to system memory for the purpose of off-loading texturing, z-
buffering, and alpha blending used in 3D graphics operations. By off-loading a large portion of
3D data to system memory the AGP graphics adapter only requir es en ough memory for frame
buffer (display image) refreshing.
4.3.1 BUS TRANSACTIONS
The operation of the AGP bus is based on the 66-MHz PCI specification but includes additional
mechanisms to increase bandwidth. During the configuration phase the AGP bus acts in
accordance with PCI protocol. Once operation with the AGP adapter involves graphics data
handling, AGP-defined pr otocols take effect. The AGP graphics adapter act s g en erally as the
AGP master, but can also behave as a “PCI” ta r get during fast writes from the n orth bridge.
Key differences between the AGP interface and the PCI int erface are as follows:
Address phase and associated data transfer phase are disconnected transactions. Addressing
and data transferring occur as contiguous actions on the PCI bus. On the AGP bus a request
for data and the transfer of data may be separated by other operations.
Commands on the AGP bus specify system memory accesses only. Unlike the PCI bus,
commands involving I/O and configuration are not required or allowed. The system memory
address space used in AGP operations is the same linear space used by PCI memory space
commands, but is further specified by the graphics address re-mapping table (GART) of the
north bridge component.
Data transactions on the AGP bus involve eight bytes or multiples of eight bytes. The AGP
memory addressing protocol uses 8-byte boundaries as opposed to PCI’s 4-byte boundaries. If
a transfer of less than eight bytes is needed, the remaining bytes are filled with arbitrary data
that is discarded by the target.
Pipelined requests are defined by length or si z e on t h e AGP bus. The PCI bus defines
transfer lengths with the FRAME- signal.
There are two basic types of transactions on th e AGP bus: d ata r equests (addressing) and data
transfers. These actions are separate from each other.