Cypress manual AC Test Loads and Waveforms, CY7C107BN CY7C1007BN

Models: CY7C107BN CY7C1007BN

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AC Test Loads and Waveforms

CY7C107BN

CY7C1007BN

AC Test Loads and Waveforms

5V

 

 

 

 

R1 480Ω

5V

 

 

 

 

R1 480Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3.0V

 

 

 

 

 

 

OUTPUT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OUTPUT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10%

 

 

 

 

30 pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R2

5 pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R2

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

INCLUDING

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

255Ω

INCLUDING

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

255Ω

 

≤ 3 ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JIG AND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JIG AND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SCOPE

(a)

SCOPE

(b)

 

 

 

 

 

 

 

ALL INPUT PULSES

90%

90%

10%

≤ 3 ns

Equivalentto:

THÉVENIN EQUIVALENT

 

 

167Ω

OUTPUT

 

 

 

 

1.73V

 

 

 

Switching Characteristics[5] Over the Operating Range

 

 

 

 

 

 

7C107BN-15

 

 

 

 

 

 

7C1007BN-15

 

Parameter

 

 

 

Description

 

 

 

Unit

 

 

 

Min.

 

Max.

 

 

 

 

 

 

 

 

 

READ CYCLE

 

 

 

 

 

 

 

 

 

 

 

 

 

tRC

 

Read Cycle Time

15

 

 

ns

tAA

 

Address to Data Valid

 

 

15

ns

tOHA

 

Data Hold from Address Change

3

 

 

ns

tACE

 

 

 

LOW to Data Valid

 

 

15

ns

CE

 

tLZCE

 

 

 

LOW to Low Z[6]

3

 

 

ns

CE

 

 

tHZCE

 

 

 

HIGH to High Z[6, 7]

 

 

7

ns

CE

 

tPU

 

 

 

LOW to Power-Up

0

 

 

ns

CE

 

 

tPD

 

 

 

HIGH to Power-Down

 

 

15

ns

CE

 

WRITE CYCLE[8]

 

 

 

 

 

 

 

 

tWC

 

Write Cycle Time

15

 

 

ns

tSCE

 

 

 

LOW to Write End

12

 

 

ns

CE

 

 

tAW

 

Address Set-Up to Write End

12

 

 

ns

tHA

 

Address Hold from Write End

0

 

 

ns

tSA

 

Address Set-Up to Write Start

0

 

 

ns

tPWE

 

 

 

Pulse Width

12

 

 

ns

WE

 

 

tSD

 

Data Set-Up to Write End

8

 

 

ns

tHD

 

Data Hold from Write End

0

 

 

ns

tLZWE

 

 

 

HIGH to Low Z[6]

3

 

 

ns

WE

 

 

tHZWE

 

 

 

LOW to High Z[6, 7]

 

 

7

ns

WE

 

Notes:

5.Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance.

6.At any given temperature and voltage condition, tHZCE is less than tLZCE and tHZWE is less than tLZWE for any given device.

7.tHZCE and tHZWE are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.

8.The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. CE and WE must be LOW to initiate a write, and the transition of any of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.

Document #: 001-06426 Rev. **

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Cypress manual AC Test Loads and Waveforms, Switching Characteristics5 Over the Operating Range, CY7C107BN CY7C1007BN