Functional Description
MVME3100 Single Board Computer Installation and Use (6806800M28C) 75
4.6 Local Bus Interface
The MVME3100 uses the MPC8540 local bus controller (LBC) for access to on-board Flash and
I/O registers. The LBC has programmable timing modes to support devices of different access
times, as well as device widths of 8, 16, and 32 bits.
The MVME3100 uses the LBC in GPCM (general purpose chip select machine) mode to
interface to tw o physical ba nks of on- board Flash, an on-boar d quad UART (Q UART), on-b oard
32-bit timers, and the System Control/Status registers. Refer to the MVME3100 Single-Board
Computer Programmer’s Reference Guide listed in Appendix B, Related Documentation, for the
LBC bank and chip select assignments.

4.6.1 Flash Memory

The MVME3100 provides one physical bank of soldered-on Flash memory. The bank is
composed of two physi cal Flash devices configured to op erate in 16-bit m ode to form a 32- bit
Flash bank. The default configuration for the MVME3100-1263 is 128MB using two 512Mb
devices, and for the MVME3100-1152 it is 64MB using two 256Mb devices.
Refer to the MVME3100 Single-Board Computer Programmer’s Reference Guide listed in
Appendix B, Related Documentatio n, for more information.

4.6.2 Control and Timers Logic

The MVME3100 control and timers logic resides on the local bus. This logic provides the
following functions on the board:
zLocal bus address latch
zChip selects for Flash banks and QUART
zSystem Control and Status registers
zFour 32-bit tick timers
zReal-time clock (RTC) 1 MHz reference clock
Refer to the MVME3100 Single-Board Computer Programmer’s Reference Guide listed in Appendix
B, Related Documentati on, for more information.