RTC - 4543 SA/SB
6.Timer Data Organization
•The counter data is BCD code.
•The timer automatically adjusts for different month lengths and for leap year.
•The time is indicated in
•Writes and reads are both performed on an
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Second | FDT | s40 | s20 | s10 | s8 | s4 | s2 | s1 | |
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Minutes |
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* | mi40 | mi20 | mi10 | mi8 | mi4 | mi2 | mi1 | ||
( 0 to 59 ) | |||||||||
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Hour ( 0 to 23 ) |
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* | * | h20 | h10 | h8 | h4 | h2 | h1 | ||
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Day of the week |
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| * | w4 | w2 | w1 | ||
( 1 to 7 ) |
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Day ( 1 to 31 ) |
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* | * | d20 | d10 | d8 | d4 | d2 | d1 | ||
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Month ( 1 to 12 ) |
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TM | * | * | mo10 | mo8 | mo4 | mo2 | mo1 | ||
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Year ( 0 to 99 ) |
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y80 | y40 | y20 | y10 | y8 | y4 | y2 | y1 | ||
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*bits: Any data may be written to these bits.
•FDT bit: Supply voltage detection bit
•This bit is set to “1” when voltage of 1.7 ± 0.3 V or less is detected between VDD and GND.
•The FDT bit is cleared if all of the digits up to the year digits are read.
•Although this bit can be both read and written, normally set this bit to “0”.
VDD VDET
| 0.5 s |
| 0.5 s | |
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Detection pulse
Mode | Read |
FDT bit
The supply voltage detection circuit monitors the supply voltage once every 0.5 seconds; if the supply voltage is lower than the detection voltage value, the FDT bit is set to “1”.
•TM bit: This is a test bit for
Page - 6 | MQ - 252 - 03 |