RX - 8581 SA / JE / NB
7.2. AC Characteristics
*Unless otherwise specified, GND = 0 V , VDD = 1.8 V to 5.5 V , Ta = − 40 ° C to +85 ° C
Item | Symbol | Condition | Min. | Typ. | Max. | Unit | |
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SCL clock frequency | fSCL |
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| 400 | kHz | |
Start condition setup time | tSU;STA |
| 0.6 |
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Start condition hold time | tHD;STA |
| 0.6 |
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Data setup time | tSU;DAT |
| 100 |
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Data hold time | tHD;DAT |
| 0 |
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Stop condition setup time | tSU;STO |
| 0.6 |
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Bus idle time between | tBUF |
| 1.3 |
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start condition and stop condition |
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Time when SCL = "L" | tLOW |
| 1.3 |
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Time when SCL = "H" | tHIGH |
| 0.6 |
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Rise time for SCL and SDA | tr |
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| 0.3 | ∝ s | |
Fall time for SCL and SDA | tf |
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| 0.3 | ∝ s | |
Allowable spike time on bus | tSP |
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| 50 | ns | |
FOUT duty | tW /t | VDD = 2.4 V ∼ 5.5 V | 45 | 50 | 55 | % | |
50% of VDD level | |||||||
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Timing chart |
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Protocol
| START |
| BIT 7 | BIT 6 |
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| BIT 0 | ACK |
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| STOP |
| START |
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| MSB |
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| LSB |
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| (A7) | (A6) |
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| (R/W) | (A) |
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tSU ; STA tLOW tHIGH 1 / fSCLtSU ; STA
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SCL |
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| tBUF |
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| tf |
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SDA |
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| tHD ; STA |
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| tSU ; DAT | tHD ; DAT |
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| tSP |
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| tSU ; STO |
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| tHD ; STA |
Caution: When accessing this device, all communication from transmitting the start condition to transmitting the stop condition after access should be completed within 0.95 seconds.
If such communication requires 0.95 seconds or longer, the I2C bus interface is reset by the internal bus timeout function.
Page - 4 |