Fairchild BSS84 manual Channel Enhancement Mode Field Effect Transistor, Thermal Characteristics

July 2002

BSS84

P-Channel Enhancement Mode Field Effect Transistor

BSS84

General Description

These P-Channel enhancement mode field effect transistors are produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process has been designed to minimize on- state resistance, provide rugged and reliable performance and fast switching. They can be used, with a minimum of effort, in most applications requiring up to 0.13A DC and can deliver current up to 0.52A.

This product is particularly suited to low voltage applications requiring a low current high side switch.

Features

• − 0.13A, − 50V. RDS(ON) = 10Ω @ VGS = − 5 V

•Voltage controlled p-channel small signal switch

•High density cell design for low RDS(ON)

•High saturation current

D

S

SOT-23 G

Absolute Maximum Ratings TA=25oC unless otherwise noted

D

G S

Symbol	Parameter		Ratings		Units
VDSS	Drain-Source Voltage			− 50	V
VGSS	Gate-Source Voltage			± 20	V
ID	Drain Current – Continuous	(Note 1)	−	0.13	A
	– Pulsed		−	0.52
PD	Maximum Power Dissipation	(Note 1)		0.36	W
	Derate Above 25° C			2.9	mW/° C
TJ, TSTG	Operating and Storage Junction Temperature Range		− 55 to +150		° C
TL	Maximum Lead Temperature for Soldering			300
	Purposes, 1/16” from Case for 10 Seconds

Thermal Characteristics

Rθ JA Thermal Resistance, Junction-to-Ambient (Note 1) 350 ° C/W

Package Marking and Ordering Information

Device Marking	Device	Reel Size	Tape width	Quantity
SP	BSS84	7’’	8mm	3000 units

 2002 Fairchild Semiconductor Corporation BSS84 Rev B(W)