DSP56364 24-Bit Digital Signal Processor Users Manual, Rev. 2
Freescale Semiconductor xv
Preface
This manual contains the following sections and appendices.
SECTION 1—DSP56364 OVERVIEW
• Provides a brief description of the DSP56364, including a features list and block diagram. Lists
related documentation needed to use this chip and describes the organization of this manual.
SECTION 2—SIGNAL/CONNECTION DESCRIPTIONS
• Describes the signals on the DSP56364 pins and how these signals are grouped into interfaces.
SECTION 3—MEMORY CONFIGURATION
• Describes the DSP56364 memory spaces, RAM and ROM configuration, memory configurations
and their bit settings, and memory maps.
SECTION 4—CORE CONFIGURATION
• Describes the registers used to configure the DSP56300 core when programming the DSP56364,
in particular the interrupt vector locations and the operation of the interrupt priority registers.
Explains the operating modes and how they affect the processor’s program and data memories.
SECTION 5—GENERAL PURPOSE INPUT/OUTPUT (GPIO)
• Describes the DSP56364 GPIO capability and the programming model for the GPIO signals
(operation, registers, and control).
SECTION 6—ENHANCED SERIAL AUDIO INTERFACE (ESAI)
• Describes the full-duplex serial port for serial communication with a variety of serial devices.
SECTION 7—SERIAL HOST INTERFACE (SHI)
• Describes the serial input/output interface providing a path for communication and
program/coefficient data transfers between the DSP and an external host processor. The SHI can
also communicate with other serial peripheral devices.
APPENDIX A—BOOTSTRAP PROGRAM
• Lists the bootstrap code used for the DSP56364.
APPENDIX B—BSDL LISTING
• Provides the BSDL listing for the DSP56364.
APPENDIX C—PROGRAMMING REFERENCE
• Lists peripheral addresses, interrupt addresses, and interrupt priorities for the DSP56364. Contains
programming sheets listing the contents of the major DSP56364 registers for programmer
reference.