DSP56364 24-Bit Digital Signal Processor Users Manual, Rev. 2
Freescale Semiconductor 1-1
1 Overview
1.1 Introduction
The DSP56364 24-Bit Digital Signal Processor, a new audio digital signal processor based on the 24-bit
DSP56300 architecture, is targeted to applications that require digital audio signal processing such as
sound field processing, acoustic equalization and other digital audio algorithms.
The DSP56364 supports digital audio applications requiring sound field processing, acoustic equalization,
and other digital audio algorithms. The DSP56364 uses the high performance, single-clock-per-cycle
DSP56300 core family of programmable CMOS digital signal processors (DSPs) combined with the audio
signal processing capability of the Freescale Symphony™ DSP family, as shown in Figure 1-1. This
design provides a two-fold performance increase over Freescale’s popular Symphony family of DSPs
while retaining code compatibility. Significant architectural enhancements include a barrel shifter, 24-bit
addressing, instruction cache, and direct memory access (DMA).
This document is intended to be used with the following Freescale publications:
• DSP56300 24-Bit Digital Signal Processor Family Manual, Freescale publication DSP56300FM.
• DSP56364 24-Bit Digital Signal Processor Technical Data Sheet, Freescale publication
DSP56364.
The DSP56300 24-Bit Digital Signal Processor Family Manual, Freescale publication DSP56300FM
provides a description of the components of the DSP56300 modular chassis which is common to all
DSP56300 family processors and includes a detailed description of the instruction set. This document
provides a detailed description of the core configuration, memory, and peripherals that are specific to the
DSP56364. The electrical specifications, timings and packaging information can be found in the
DSP56364 Technical Data Sheet.