Fujitsu MB15F74UL TEST CIRCUIT (for Measuring Input Sensitivity fin/OSCIN)

MB15F74UL

■TEST CIRCUIT (for Measuring Input Sensitivity fin/OSCIN)

1000 pF

0.1 µFVpRF

VCCRF

50 Ω

S.G.

VpIF

VCCIF

0.1 µF

1000 pF

GND OSCIN DataClock

PSRF

VCCRF

GNDRF

XfinRF

finRF

109

LD/foutDoIF DoRF VpRF

VpIF

PSIF

VCCIF

GNDIF

XfinIF

finIF

Contents

Main DS04-21374-1E FUJITSU SEMICONDUCTOR DATA SHEET ASSP MB15F74UL DESCRIPTION FEATURES PACK AGE PIN ASSIGNMENTS PIN DESCRIPTION MB15F74UL BLOCK DIAGRAM MB15F74UL ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS MB15F74UL FUNCTIONAL DESCRIPTION 1. Pulse swallow function 2. Serial Data Input Page Page 3. Power Saving Mode (Intermittent Mode Control Circuit) 4. Serial Data Data Input Timing PHASE COMPARATOR OUTPUT WAVEFORM TEST CIRCUIT (for Measuring Input Sensitivity fin/OSCIN) Controller (Divide ratio setting) MB15F74UL Oscilloscope MB15F74UL TYPICAL CHARACTERISTICS IF-PLL input sensitivity vs. Input frequency 1. RF-PLL input sensitivity vs. Input frequency 2. 3. RF-PLL Do output current 4. 5. finIF input impedance fin 6. OSC OSCIN input impedance REFERENCE INFORMATION (for Lock-up Time, Phase Noise and Reference Leakage) PLL Phase Noise PLL Reference Leakage Page APPLICATION EXAMPLE MB15F74UL USAGE PRECAUTIONS ORDERING INFORMATION PACKAGE DIMENSION 20-pad plastic BCC (LCC-20P-M05) 2001 FUJITSU LIMITED C20056S-c-2-1 Dimensions in mm (inches) FUJITSU LIMITED F0210 FUJITSU LIMITED Printed in Japan