Processor/Memory Subsystem
| 1 FFFF FFFEh | High BIOS Area | |||
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| FFE0 0000h | DMI/APIC | |
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| F000 0000h |
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| PCI | |
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| Memory | |
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Main | IGC | ||||
TSEG | |||||
Memory | |||||
Area | Main | ||||
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| 0100 0000h | Memory | |
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| 00FF FFFFh |
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| Main | |
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| Memory | |
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| 0010 0000h |
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| 000F FFFFh | BIOS | |
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| Extended BIOS | |
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DOS | Expansion Area | ||||
Compatibilty | Legacy Video | ||||
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Base Memory | |||||
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| 0000 0000h | ||
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8 GB
Top of DRAM
16 MB
1MB
640 KB
Figure
✎All locations in memory are cacheable. Base memory is always mapped to DRAM. The next 128 KB fixed memory area can, through the north bridge, be mapped to DRAM or to PCI space. Graphics RAM area is mapped to PCI locations.
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