4.6Advanced Chipset Features

This section allows you to configure the system based on the specific features of the installed chipset. This chipset manages bus speeds and the access to the system memory resources, such as DRAM and the external cache. It also coordinates the communications between the conventional ISA and PCI buses. It must be stated that these items should never be altered. The default settings have been chosen because they provide the best operating conditions for your system. You might consider making any changes only if you discover that the data has been lost while using your system.

CMOS Setup Utility－Copyright ©1984-2001 Award Software

Advanced Chipset Features

DRAM Timing Selectable

By SPD

 

Item Help

 

CAS Latency Time

1.5

 

 

Menu Level

X

Active to Precharge Delay

7

 

 

 

 

DRAM RAS# to CAS# Delay

3

 

 

 

 

DRAM RAS# Precharge

3

 

 

Change the day, month,

Turbo Mode

Disabled

 

year and century

 

Memory Frequency For

Auto

 

 

 

 

System BIOS Cacheable

Enabled

 

 

 

Video BIOS Cacheable

Enabled

 

 

 

Memory Hole At 15M-16M

Disabled

 

 

 

Delayed Transaction

Enabled

 

 

 

Delay Prior to Thermal

16Min

 

 

 

AGP Aperture Size (MB)

64

 

 

 

 

** ON-chip VGA Setting **

 

 

 

 

On-chip VGA

Enabled

 

 

 

On-chip Frame Buffer size

8MB

 

 

 

 

: Select Item

+ / - /PU/PD: Value

F10: Save

ESC: Quit F1: General Help

F5: Previous Values

F6: Fail-Safe Defaults

F7: Optimized Defaults

 

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