Integration 2.0r manual Traditional mode

OVERVIEW

The demo uses the developer-friendly features of the IA4420 device. In receive mode the microcontroller reads the received bytes from the IA4420’s FIFO, and transmits them through the TX latch. This approach dramatically reduces the load on the micro, because the microcontroller doesn’t have to monitor every bit, only the bytes. This means the timing constraints in an application can be reduced at least by a factor of eight for both the transmitting and the receiving sides. See the PROCESSOR ACTIVITY lines on Figure 2, as demonstrated for both the ‘Traditional’ transceiver mode and the Integration ‘FIFO’ mode.

"Traditional" mode

DATA CLK

PROCESSOR ACTIVITY

FIFO mode

byte1

RF PACKETS (8bit) 1

INTERRUPT REQs

PROCESSOR ACTIVITY

FIFO IT level set to 8 bit

FIFO LEVEL STATUS

FIFO empty

2

3

4

5

Fig 2. Process Activity in FIFO Mode when Compared to a Traditional Mode of Operation

3