This document describes the Intel 21152 PCI-to-PCI Bridge Evaluation Board (also referred to as the EB152). The EB152 is an evaluation and development board for systems based on the Intel 21152 PCI-to-PCI Bridge chip (the 21152).
Intel’s 21152 is a second-generation PCI-to-PCI bridge and is fully compliant with the electrical and protocol requirements of the PCI-to-PCI Bridge Architecture Specification, Revision 2.1, and the PCI-to-PCI Bridge Architecture Specification, Revision 1.0. The 21152 provides full support for delayed transactions, which enables the buffering of memory read, I/O, and configuration transactions. The 21152 has separate posted write, read data, and delayed transaction queues with significantly more buffering capability than first-generation bridges.
For detailed information about the 21152, refer to the 21152 PCI-to-PCI Bridge Data Sheet.
1.1Overview
This chapter provides an overview of the 21152 PCI-to-PCI Bridge Evaluation Board EB152 and includes information about the following topics:
•Jumper location
•Secondary slot numbering and IDSEL mapping
•Typical configurations
The EB152 is a universal PCI expansion board that is used to evaluate the operation of the 21152 in various configurations, and with a variety of PCI devices. The EB152 can be used to perform the following functions:
•Develop initialization code to configure a PCI-to-PCI bridge and the PCI devices behind the bridge
•Evaluate the operation of a PCI-to-PCI bridge with a variety of PCI devices attached to the secondary bus
•Build and evaluate a flexible hierarchy for multiple PCI buses
1.2Features
The EB152 has the following features:
•Complies fully with the protocol and electrical standards of the PCI Local Bus Specification, Revision 2.1.
•Includes a 21152 PCI-to-PCI Bridge that provides bridging between a primary and secondary bus.
•Includes a primary PCI bus that plugs into any 5-V or 3.3-V PCI option card slot.
