Secondary Bus Arbitration
Figure 4-1. Arbitration Jumpers
Viewed from Side 1
E 3 _ Socket for
J 1 3
J 9
J 8
J 6
J3
J 5
| J 4 |
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| J 1 1 |
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| J 2 |
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J 1 0 |
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| J 1 2 | |||
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| J 7 |
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| W 7 | |
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| W 5 | ||||
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Optional PAL to Control Secondary Bus External Arbitration
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W 4 |
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| E4 | ||||||
W 1 |
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| 2 1 1 | 5 2 |
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W 1 , W 4 , J 7 _ Secondary Bus |
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External/Internal Arbitration |
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Configurable Jumpers | L J - 0 5 1 2 7 . A I 4 |
Table
Table | Internal Arbitration Jumper Positions | ||
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| Jumper | Position | Description |
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| J7 | Bottom | Selects the 21152 as the source of secondary grant signals. |
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| W4 | Left | Selects the board signal sreq<0>_l (device 4 request signal) to drive the 21152 |
| s_req_l<0> input. | ||
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| W1 | Left | Ties s_cfn_l low, which enables the 21152 internal arbiter. When the |
| secondary PCI bus is idle, parking is at the 21152. | ||
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21152 |