TK-7102H
17
Control Circuit
The CPU carries out the following tasks:
1) Controls the WIDE, NARROW, TX/RX outputs.
2) Adjusts the AF signal level of the AF filter (IC251) and
turns the filter select compounder on or off.
3) Controls the display unit.
4) Controls the PLL (IC401).
5) Controls the D/A converter (IC161) and adjusts the vol-
ume, modulation and transmission power.

■ Memory Circuit

The transceiver has an 64k-bit EEPROM (IC66). The
EEPROM contains adjustment data. The CPU (IC101) con-
trols the EEPROM through three serial data lines.
IC161
D/A
converter
IC401
PLL
IC101
CPU
LD
DT
CK
PLLE
EEPCK
IC101
CPU
IC66
EEPROM
EEPDT
EEPWP

■ Display Circuit

The shift register controls the display LEDs through the CL
and DI lines from the CPU (IC101).
When the transceiver is busy, LED G line becomes high
impedance, turning on Q4 and the green LED (D11) lights, in
transmit mode, the LED R line becomes low impedance, and
the red LED (D12) lights.
Backlit LEDs (D1~D4) are provided and will only goes off
when MBL line becomes low impedance.
When a function key (MON, PF, C1, C2, C3 or C4) is se-
lected, its respective line becomes low impedance (LED
MON, LED PF, LED C1, LED C2, LED C3 or LED C4), the
amber LED lights.

■ Key Matrix Circuit

The TK-7102H front panel has function keys. Each of
them is connected to a cross point of a matrix of the KMI1 to
KMO2 ports of the microprocessor. The KMO1 to KMO2
ports are always high, while the KMI1 to KMI4 ports are al-
ways low.
The microprocessor monitors the status of the KMI1 to
KMO2 ports. If the state of one of the ports changes, the
microprocessor assumes that the key at the matrix point cor-
responding to that port has been pressed.
IC101
CPU
KMI1
KMI2
KMI3
KMI4
KMO1
KMO2
↑
↓
1
2
3P
M4

Fig. 10 Control circuit

Fig. 11 Memory circuit

Q4
SW
Q10
SW
Q9
SW
IC101
CPU
D1~D4
IC1
Shift
register
CL LED MON
LED PF
LED C1
LED C2
LED C3
LED C4
LED R
LED G
MICBL
DI
D6
D5
D7
D8
D9
D10
D12
D11

Fig. 12 Display circuit

Fig. 13 Key matrix circuit

CIRCUIT DESCRIPTION

■ Encode

The QT and DQT signals are output from QT/DQT of the
CPU (IC101) and summed with the external pin DI line by the
summing amplifier (IC203) and the resulting signal goes to
the D/A converter (IC161). The DTMF signal is output from
DTMF of the CPU and goes to the D/A converter (IC161). The
signal is summed with a MIC signal by the summing amplifier
(IC203), and the resulting signal goes to the D/A converter
(IC161).
The D/A converter (IC161) adjusts the MO level and the
balance between the MO and QT/DQT levels. Part of a QT/
DQT signal is summed with MO and the resulting signal goes
to the VCOMOD pin of the VCO. This signal is applied to a
varicap diode in the VCO for direct FM modulation.
X401
TCXO
IC161
D/A VCO
IC203
SUM
AMP
IC203
SUM
AMP
IC161
D/A
IC401
PLL
TCXO
MOD
VCO
MOD
HT
DI
QT/DQT
DTMF
IC101
CPU

Fig. 14 Encodet