DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock
space SRAM is read/write accessible and is memory mapped. This on-chip SRAM is reached by the MOVX instruction. It is not used for executable memory. The scratchpad area is 256 bytes of register mapped RAM and is identical to the RAM found on the 80C52. There is no conflict or overlap among the 256 bytes and the 1kB as they use different addressing modes and separate instructions.
OPERATIONAL CONSIDERATION
The erasure window of the windowed LCC should be covered without regard to the programmed/unprogrammed state of the EPROM. Otherwise, the device may not meet the AC and DC parameters listed in the data sheet.
PROGRAM MEMORY ACCESS
On-chip ROM begins at address 0000h and is contiguous through 3FFFh (16kB). Exceeding the maximum address of on-chip ROM will cause the DS87C530/DS83C530 to access off-chip memory. However, the maximum on-chip decoded address is selectable by software using the ROMSIZE feature. Software can cause the microcontroller to behave like a device with less on-chip memory. This is beneficial when overlapping external memory, such as Flash, is used.
The maximum memory size is dynamically variable. Thus a portion of memory can be removed from the memory map to access off-chip memory, then restored to access on-chip memory. In fact, all the on-chip memory can be removed from the memory map allowing the full 64kB memory space to be addressed from off-chip memory. ROM addresses that are larger than the selected maximum are automatically fetched from outside the part via Ports 0 and 2. Figure 4 shows a depiction of the ROM memory map.
The ROMSIZE register is used to select the maximum on-chip decoded address for ROM. Bits RMS2, RMS1, RMS0 have the following effect:
RMS2 | RMS1 | RMS0 | MAXIMUM ON-CHIP ROM ADDRESS |
| | | |
0 | 0 | 0 | 0kB |
| | | |
0 | 0 | 1 | 1kB |
| | | |
0 | 1 | 0 | 2kB |
| | | |
0 | 1 | 1 | 4kB |
| | | |
1 | 0 | 0 | 8kB |
| | | |
1 | 0 | 1 | 16kB (default) |
| | | |
1 | 1 | 0 | Invalid—reserved |
| | | |
1 | 1 | 1 | Invalid—reserved |
| | | |
The reset default condition is a maximum on-chip ROM address of 16kB. Thus no action is required if this feature is not used. When accessing external program memory, the first 16kB would be inaccessible. To select a smaller effective ROM size, software must alter bits RMS2–RMS0. Altering these bits requires a timed-access procedure.
Care should be taken so that changing the ROMSIZE register does not corrupt program execution. For example, assume that a device is executing instructions from internal program memory near the 12kB boundary (~3000h) and that the ROMSIZE register is currently configured for a 16kB internal program space. If software reconfigures the ROMSIZE register to 4kB (0000h–0FFFh) in the current state, the