12
80
8050QMA
50QMA N/B Maintenance
N/B Maintenance
•Supports only 1.5-V AGP electrics
•32 deep AGP request queue
•Hierarchical PCI-compliant configuration mechanism for downstream devices
•Direct Media Interface (DMI)
– Chip-to-chip interconnect between the GMCH and ICH6-M
– DMI x2 and DMI x4 configuration supported
– Bit swapping is supported
– Lane reversal is not supported
1.2.4 I/O Controller Hub : Intel ICH6-M The ICH6 provides extensive I/O support. Functions and capabilities include:
•PCI Express Base Specification, Revision 1.0a-compliant
•PCI Local Bus Specification, Revision 2.3-compliant with support for 33 MHz PCI operations(supports up t o
seven Req/Gnt pairs)
•ACPI Power Management Logic Support
•Enhanced DMA controller, interrupt controller and timer functions
MiTac Secret
Confidential Document