ADC12V170 Evaluation Board User’s Guide
Analog Input FIN > 150 MHz
Clock
Buffer
(Reverse
Side)
Analog Input
FIN < 150 MHz
Analog Input
Network
ADC
PD
Jumper
CLK_SEL/DF
Jumper
Single- |
| |
Ended | FutureBus | |
Clock | ||
Connector | ||
Input | ||
|
5.0V Power
Connector
Figure 1. ADC12V170 Evaluation Board Connector and Jumper Locations
N - 2 - | www.national.com |
| Rev 0.0 |
