
Appendix A Specifications
NI 5401 User Manual A-4 www.natinst.com
SYNC OutLevel ......................................................TTL
Duty cycle...............................................20% to 80%, software
controllable
External Clock Reference InputFrequency...............................................1 MHz or 5–20 MHz in 1 MHz
steps
Amplitude...............................................1 Vpk-pk ≤ level ≤ 5 Vpk-pk
Internal ClockFrequency...............................................40 MHz
Initial accuracy .......................................±5 ppm
Temperature stability (0 to 5 °C)............±25 ppm
Aging (1 year).........................................±5 ppm
MechanicalConnectors
ARB (output)...................................SMB/BNC
SYNC (output).................................SMB/BNC
PLL reference (input)......................SMB
External trigger in............................50-pin digital (PCI),
SMB (PXI)
Size.........................................................1 slot
Power requirements ...............................5 V, 3.5 A max
12 V, 125 mA