National Instruments NI cDAQ-9172 Prescaling

NI cDAQ-9172 User Guide and Specifications 70 ni.com

You can configure the filter setting for each input independently. On power

up, the filters are disabled. Figure41 shows an example of a low to high

transition on an input with its filter set to 125 ns (N = 5).

Figure 41. Filter Example

Enabling filters introduces jitter on the input signal. For the 125 ns and

6.425 µs filter settings, the jitter is up to 25n s. On the 2.56 ms setting, the

jitter is up to 10.025 µs.

Prescaling

Prescaling allows the counter to count a signal that is faster than the

maximum timebase of the counter. The NI cDAQ-9172 chassis offers

8X and 2X prescaling on each counter (prescaling can be disabled). Each

prescaler consists of a small, simple counter that counts to eight (or two)

and rolls over. This counter can run faster than the larger counters, which

simply count the rollovers of this smaller counter. Thus, the prescaler acts

as a frequency divider on the Source and puts out a frequency that is

one-eighth (or one-half) of what it is accepting.

Figure 42. Prescaling

Prescaling is intended for frequency measurement where the measurement

is made on a continuous, repetitive signal. The prescaling counter cannot

be read; therefore, you cannot determine how many edges have occurred

since the previous rollover. You can use prescaling for event counting

provided it is acceptable to have an error of up to seven (or one). You can

use prescaling when the counter Source is an external signal. Prescaling

is not available if the counter Source is one of the internal timebases

(80MHzTimebase, 20MHzTimebase, or 100kHzTimebase).

1 2 3 1 4 1 2 3 4 5

PFI Terminal

Filter Clock

(40 MHz)

Filtered Input

Filtered input goes high

when terminal is sampled

high on five consecutive

filter clocks.

External Signal

Counter Value

Prescaler Rollover

(Used as Source

by Counter)

0 1

Contents

Main USER GUIDE AND SPECIFICATIONS NI cDAQ-9172 DeutschFranais ni.com/manuals Contents Page Page Introduction Safety Guidelines Safety Guidelines for Hazardous Voltages Related Documentation Page Page Device Documentation and Specifications Training Courses Technical Support on the Web Installing the Software National Instruments Corporation 11 NI cDAQ-9172 User Guide and Specifications Installing the NI cDAQ-9172 Figure 2 shows the dimensions of the NI cDAQ-9172 chassis. Figure 2. NI cDAQ-9172 with Dimensions in Millimeters (Inches) Mounting the NI cDAQ-9172 NI 9901 Desktop Mounting Kit NI 9910 DIN-Rail Kit NI 9905 Panel Mount Kit Page Setting Up the NI cDAQ-9172 Page Understanding LED Indications Active LED Ready LED Using the NI cDAQ-9172 C Series I/O Modules Correlated vs. Static DIO Modules cDAQ Module Interface USB-STC2 AI and AO Sample Timing Triggering Modes Analog Input Analog Input Triggering AI Start Trigger Signal Routing AI Start Trigger to an Output Terminal AI Reference Trigger Signal Routing AI Reference Trigger Signal to an Output Terminal AI Pause Trigger Signal Analog Input Timing Signals AI Sample Clock Routing AI Sample Clock to an Output Terminal AI Sample Clock Timebase Convert Behavior For Analog Input Modules Scanned Simultaneous Sample-and-Hold Sigma-Delta Slow Sample Rate Modules Getting Started with AI Applications in Software Analog Output Analog Output Data Generation Methods Software-Timed Generations Hardware-Timed Generations Buffered Analog Output Analog Output Triggering Analog Output Timing Signals AO Sample Clock Routing AO Sample Clock to an Output Terminal AO Sample Clock Timebase Signal AO Start Trigger Signal Routing AO Start Trigger Signal to an Output Terminal AO Pause Trigger Signal Minimizing Glitches on the Output Signal Getting Started with AO Applications in Software Digital I/O Correlated vs. Static DIO Modules Static DIO Digital Waveform Acquisition (Correlated Input) DI Sample Clock Signal Using an Internal Source Using an External Source Digital Waveform Generation (Correlated Output) Buffered Digital Waveform Generation Change Detection Event Routing Change Detection Event to an Output Term ina l Change Detection Acquisition Digital Input/Output Configuration for NI 9401 PFI Counters Figure 15. NI cDAQ-9172 Counters Counter Input Applications Counting Edges Single-Point (On-Demand) Edge Counting Buffered (Sample Clock) Edge Counting Controlling the Direction of Counting Pulse-Width Measurement Single Pulse-Width Measurement Buffered Pulse-Width Measurement Period Measurement Single Period Measurement Buffered Period Measurement Semi-Period Measurement Single Semi-Period Measurement Buffered Semi-Period Measurement Frequency Measurement Method 1Measure Low Frequency With One Counter Method 1bMeasure Low Frequency With One Counter (Averaged) Method 2Measure High Frequency With Two Counters Method 3Measure Large Range of Frequencies Using TwoCounters Page Choosing a Method for Measuring Frequency Position Measurement Measurements Using Quadrature Encoders X1 Encoding X2 Encoding X4 Encoding Channel Z Behavior Measurements Using Two Pulse Encoders Two-Signal Edge-Separation Measurement Single Two-Signal Edge-Separation Measurement Buffered Two-Signal Edge-Separation Measurement Counter Output Applications Simple Pulse Generation Single Pulse Generation with Start Trigger Retriggerable Single Pulse Generation Pulse Train Generation Continuous Pulse Train Generation Frequency Generation Using the Frequency Generator Frequency Division Counter Timing Signals Counter n Source Signal Routing a Signal to Counter n Source Routing Counter n Source to an Output Terminal Counter n Gate Signal Routing a Signal to Counter n Gate Routing Counter n Gate to an Output Terminal Counter n Aux Signal Routing a Signal to Counter n Aux Counter n A, Counter n B, and Counter n Z Signals Routing Signals to A, B, and Z Counter Inputs Routing Counter n Z Signal to an Output Terminal Counter n Up_Down Signal Counter n HW Arm Signal Counter n Internal Output and Counter n TC Signals Routing Counter n Internal Output to an Output Terminal Frequency Output Signal Routing Frequency Output to a Terminal Default Counter/Timer Routing Counter Triggering Other Counter Features Cascading Counters Counter Filters Prescaling Duplicate Count Prevention Example Application That Works Correctly (No Duplicate Counting) Example Application That Works Incorrectly (Duplicate Counting) Example Application That Prevents Duplicate Count When To Use Duplicate Count Prevention Enabling Duplicate Count Prevention in NI-DAQmx Synchronization Modes 80 MHz Source Mode Other Internal Source Mode External Source Mode Digital Routing and Clock Generation Clock Routing 80 MHz Timebase 20 MHz Timebase 100 kHz Timebase Specifications Analog Input Analog Output Digital Waveform Characteristics (Slots 1 through 4 Only)1 PFI Characteristics (Slots 5 and 6 Only) General-Purpose Counter/Timers (Slots 5 and 6 Only)1 Frequency Generator (Slots 5 and 6 Only) External Digital Triggers (Slots 5 and 6 or with Some AI Modules) Module I/O States Power Requirements Bus Interface Physical Characteristics Safety Environmental Shock and Vibration Electromagnetic Compatibility CE Compliance RoHS Where to Go for Support