National Instruments NI PXIe-1075 External Clock Source, PXIe_SYNC_CTRL, PXI Star Trigger, PXI Differential Star Triggers (PXIe-DSTARA, PXIe-DSTARB, PXIe-DSTARC)

Appendix A Specifications
NI PXIe-1075 User Manual A-10 ni.com
External Clock Source
Frequency ...............................................10 MHz ±100 PPM
Input amplitude
Rear panel BNC...............................200 mVPP to 5 VPP square-wave
or sine-wave
System timing slot
PXI_CLK10_IN ..............................5 V or 3.3 V TTL signal
Rear panel BNC input impedance ..........50 Ω ±5 Ω
Maximum jitter introduced
by backplane ...........................................1 ps RMS phase-jitter
(10Hz–1MHz range)
PXIe_SYNC_CTRL
VIH ..........................................................2.0–5.5 V
VIL...........................................................0–0.8 V
PXI Star Trigger
Maximum slot-to-slot skew ....................250 ps
Backplane characteristic impedance.......65 Ω ±10%
Notes For PXI slot to PXI Star mapping refer to the System Timing Slot section of
Chapter 1, Getting Started.
For other specifications refer to the PXI-1 Hardware Specification.
PXI Differential Star Triggers (PXIe-DSTARA,
PXIe-DSTARB, PXIe-DSTARC)
Maximum slot-to-slot skew ....................150 ps
Maximum differential skew....................25 ps
Backplane differential impedance ..........100 Ω ±10%