NEC PD17062 - page 77

77
µ PD17062
b 3 b 2 b 1 b 0
BTM0ZX BTM0CK2 BTM0CK0
09H
BTM0CK1
0
1
0
0
0
0
0
1
010
011
100
101
110
111
TIMER INT TIMER CARRY
5 ms
100 ms
20 ms
20 ms
5 ms
5/f
TMR s
5 ms
6/f
TMR s
100 ms
5 ms
100 ms
5 ms
5/f
TMR s
5 ms
6/f
TMR s
5 ms
Time base setting
Internal
Internal
Internal
Internal
Internal
External
Internal
External
Internal
Internal
Internal
Internal
External
Internal
External
Internal
Zerocross setting
Zerocross off
Zerocross on
9.5 BTM0MD (09H)
9.6 INTVSYN (0FH, b2)
The INTVSYN flag is used for reading the vertical synchronous signal level. When a high level signal is
input to the VSYNC pin, the flag is set to 1. When a low level signal is input to the VSYNC pin , the flag is reset
to 0.