CHAPTER 7 8-BIT TIMERS 50, 60, AND 61
User’s Manual U15331EJ4V1UD
128
7.3 Control Registers for 8-Bit Timers 50, 60, and 61
8-bit timers 50, 60, and 61 are controlled by the following six registers.
• 8-bit timer mode control register 50 (TMC50)
• 8-bit timer mode control register 60 (TMC60)
• Carrier generator output control register 60 (TCA60)
• 8-bit timer mode control register 61 (TMC61)
• Port mode register 3 (PM3)
• Port 3
(1) 8-bit timer mode control register 50 (TMC50)
8-bit timer mode control register 50 (TMC50) is used to control the timer 50 count clock setting and the
operation mode setting.
TMC50 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets this register to 00H.
Figure 7-6. Format of 8-Bit Timer Mode Control Register 50 (1/2)
Symbol <7> <6> 5 4 3 2 1 <0> Address After reset R/W
TMC50 TCE50 TEG50 TCL502 TCL501 TCL500 TMD501 TMD500 TOE50 FF4DH 00H R/W
TCE50 Control of TM50 count operationNote 1
0 Clear TM50 count value and stop operation
1 Start count operation
TEG50 Selection of valid edge of TM50 count clock
0 Count at the rising edge of the count clock
1 Count at both edges of the count clockNote 2
TCL502 TCL501 TCL500 Selection of timer 50 count clock
0 0 0 fX (5.0 MHz)
0 0 1 fX/23 (625 kHz)
0 1 0 fX/27 (39.1 kHz)
0 1 1 fXT (32.768 kHz)
1 0 0 Timer 60 match signal (INTTM60)
1 0 1 Carrier clock (in carrier generator mode) or timer 60 output signal (in other than carrier
generator mode)
Other than above Setting prohibited
TMD501 TMD500 TMD601 TMD600 Selection of operation mode for timer 50 Note 3
0 0 × 0 Stand-alone mode (8-bit counter mode)
0 1 0 1 16-bit counter mode (cascade connection mode)
0 0 1 1 Carrier generator mode
1 0 × 0 PWM output mode
Other than above Setting prohibited