Chapter 3
Microcomputer Basics 1
■Register description
Group 4 Interrupt Control Register (G4ICR: 0x00008910)
bp | Flag name | Description | |
|
|
| |
15 | | | |
|
|
| |
| G4LV2 | Group 4 interrupt priority level | |
G4LV1 | |||
Set a level from 6 to 0. | |||
| G4LV0 | ||
|
| ||
|
|
| |
| | ||
|
|
| |
|
| Timer 1 underflow interrupt enable flag | |
9 | G4IE1 | 0: Disabled | |
|
| 1: Enabled | |
|
|
| |
|
| Timer 0 underflow interrupt enable flag | |
8 | G4IE0 | 0: Disabled | |
|
| 1: Enabled | |
|
|
| |
| | ||
|
|
| |
|
| Timer 1 underflow interrupt request flag | |
5 | G4IR1 | 0: No interrupt request | |
|
| 1: Interrupt request | |
|
|
| |
|
| Timer 0 underflow interrupt request flag | |
4 | G4IR0 | 0: No interrupt request | |
|
| 1: Interrupt request | |
|
|
| |
| | ||
|
|
| |
|
| Timer 1 underflow interrupt detection flag | |
1 | G4ID1 | 0: No interrupt detected | |
|
| 1: Interrupt detected | |
|
|
| |
|
| Timer 0 underflow interrupt detection flag | |
0 | G4ID0 | 0: No interrupt detected | |
|
| 1: Interrupt detected | |
|
|
|
Timer 1 Base Register (TM1BR: 0x0000A149)
bp
7
6
5
4
3
2
1
0
Flag name | Description | |
TM1BR7 |
| |
TM1BR6 |
| |
TM1BR5 |
| |
TM1BR4 | Timer 1 Base Register | |
TM1BR3 | ||
| ||
TM1BR2 |
| |
TM1BR1 |
| |
TM1BR0 |
| |
|
|
III−38