Philips TDA8443A

1995 Mar 07 15

Philips Semiconductors Product speciﬁcation

I2C-bus controlled YUV/RGB switch TDA8443A

Input clamps

The R, G, B respectively (R−Y), Y and (B−Y) video signals

are AC-coupled to the IC where they are clamped on the

black level. The timing information for this clamping action

is derived from the associated synchronization signal

SYNC, which could also consist of the composite video

information signal CVBS. The syncsignal is AC-coupled to

the IC where it is clamped on top-sync level, information

obtained from this action is used to generate the clamp

pulses.

The clamp pulses can be generated in two ways:

1. Using the sync information (internal clamping)

The sync information is clamped on top-sync and the

information obtained from this action is used to switch

an internal current source at pin 24.

Pin 24 should be connected to VP via a 4.7kΩ resistor,

and a 1 nF capacitor to ground. During video scan the

voltage at pin 24 will be HIGH (equals positive supply

voltage). During the synchronization pulses the

voltage at pin 24 will drop to zero because of the

current sink (2.5 mA).

When the synchronization pulse is over, the current

source is switched off and the voltage at pin 24 will rise

to its higher level. Because of the time constant at

pin 24, the restoration will take some microseconds.

The voltage at pin 24 is also sensed internally and at

the time it is between 0.456VP and 0.544VP, a time

pulse is generated and used for the clamping action.

2. Using a sandcastle pulse (external clamping)

If an associated sandcastle pulse is available, it can

also be used as a clamping pulse. In this event the

sandcastle pulse should be connected to pin 24, the

top of the clamping pulse should be between 0.544VP

and 0.456VP. The timing of the internal clamping pulse

will be equal to the timing of the higher part of the

sandcastle pulse. If the sync signal is also connected,

the current sink will also become active during the

synchronization pulses. This means that the

sandcastle pulse should be connected to pin 24 via a

1kΩ dropping resistor. In this event only the

sandcastle pulse at pin 24 will be influenced during

sync pulses, but the sandcastle pulse at the

sandcastle source will be unchanged.

Fig.7 Clamping circuit.

Tolerance on V1 and V2 is given by∆R/R and ∆VP/VP. The diffusion process gives∆R/R (max) = 1.5%.

handbook, halfpage

MEA623

ON when current sync = 2.5 mA

OFF when current sync = 0 mA

pin 24

9.4 kΩ

1.8 kΩ

9.4 kΩ

clamp pulse

signal

V1 = 0.544 VP

V2 = 0.456 VP