Philips TDA8767 1999 Feb 16 13, APPLICATION INFORMATION, Fig.6 Application diagram (differential input mode).

1999 Feb 16 13
Philips Semiconductors Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC) TDA8767
APPLICATION INFORMATION
Fig.6 Application diagram (differential input mode).
The analog, digital and output supplies should be separated and decoupled.
(1) At power-up a high level clock must be provided within less than 1 µs or a pull-up resistor must be connected between CLK and VCCD.
(2) R1, and R2 must be determined in order to obtain a middle voltage of 2.5 V; see Table 1. To ensure a sufficient analog input stability, the minimum
current into these resistors must be about 1mA.
(3) Vref must be decoupled to VCCA.
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andbook, full pagewidth
MBH145
1
2
3
4
5
6
7
8
9
10
11
12
n.c.n.c. n.c. n.c.
13 14 15 16 17 18 19 20 21 22
IR
D11
(MSB)
D10
TDA8767H
44 43 42 41 40 39 38 37 36 35 34 33
32
31
30
29
28
26
25
24
23
27
D2
D1
D0 (LSB)
5 V
D3
D4
D5
D6
D7
D8
D9
100 nF
5 V
100 nF
100 nF
100 nF
5 V
100 nF
Vref
(3)
5 V
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
100 nF 100 nF
5 V5 V SH
mode
VI
VICLK(1)
(2)
100 Ω100 Ω
R1
VCCA
R2
4.7 µF10
nF
220 nF 1 : 1
output format select (TC)
chip select input (OE)
IN