M16C/26 Group
Rev.0.90 2003.12.28 page 18 of 28
Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
1.7 Precautions for Serial I/O (UART Mode)
1.7 Precautions for Serial I/O (UART Mode)
1.7.1 Special Mode 2 _______ _____
If a low-level signal is applied to the P85/NMI/SD pin when the TB2SC register IVPCR1 bit = 1 (three-
_____ _________
phase output forcible cutoff by input on SD pin enabled), the RTS2 and CLK2 pins go to a high-impedance
state.
1.7.2 Special Mode 4 (SIM Mode)
A transmit interrupt request is generated by setting the U2C1 register U2IRS bit to 1 (transmission
complete) and U2ERE bit to 1 (error signal output) after reset. Therefore, when using SIM mode, be
sure to clear the IR bit to 0 (no interrupt request) after setting these bits.