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Renesas M3A-HS19 Features and Specifications , 2.6 LAN Port Interface

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Features and Specifications

2.6 LAN Port Interface

Rev.1.01 Oct 28, .2008 2-15

REJ10J1351-0101

2.6 LAN Port Interface

An IEEE 802.3 compliant (MAC layer) Ethernet controller and an IEEE802.3/802.3u compliant (10/100 Mbps Ethernet

PHY) physical layer transceiver are embedded in the SH7619 MCU.

Figure 2.6.1 shows the block diagram of LAN port interface.

SH7619 (U1)

3.3 V

LED1

Yellow LED2

Yellow LED3

Yellow LED4

Yellow

SPEED100#

LINK#

CRS#

DUPLEX#

TxP

TxM

RxP

RxM

EXRES1

TSTBUSA

12.4 K(1%)

3 VAGND

3.3 VA

RJ-45 (J5)

TX +

TX−

RX+

RX−

TCT

RCT

PHY

ETC

(MII)

CK_PHY

25.000 MHz-OSC

MII-compliant signal

Figure 2.6.1 LAN Port Interface

Contents

Main REJ10J1351-0101 Issued : Oct 28, 2008 Renesas 32-Bit RISC Microcomputers SuperHTM RISC engine Family/SH7619 Group M3 SH7619 CPU Board A -HS19 User's Manual Notes regarding these materials Table of Contents Page Page Overview 1.1 Overview 1.2 Configuration Page Page Overview 1.5 M3A-HS19 Block Diagrams 16-bit 16-bit 16-bit SH7619 CPU Board M3A-HS19 Overview 1.6 M3A-HS19 Board Overview Top view of the solder side Rev.1.01 Oct 28, 2008 1-6 REJ10J1351-0101 1.6 M3A-HS19 Board Overview Page Overview 1.7 M3A-HS19 Memory Mapping Overview 1.8 Absolute Maximu m Ratings 1.9 Recomme nded Operating Conditions Page Page Page Features and Specifications 2.2 CPU Rev.1.01 Oct 28, .2008 2-3 REJ10J1351-0101 2.2 CPU Features and Specifications 2.3 Memory 2.3.1 SH7619 U Memory and Cache Memory 2.3.2 Flash Memory S29GL032A90TFIR4 (Standard component) Page 2.3.3 External Synchronous DRAM (SDRAM) Page Page Page 2.3.3 External Synchronous DRAM Rev.1.01 Oct 28, .2008 2-10 REJ10J1351-0101 Figure 2.3.5 SDRAM Single Read/Write Timing 2.3.4 External EEPROM 2.3.4 External EEPROM Rev.1.01 Oct 28, .2008 2-12 REJ10J1351-0101 Figure 2.3.7 EEPROM-AC Timing W SK 1sec or more A 400 nsecor more 200 nsec or more 200 nsec or more Writing Enabled Data Features and Specifications 2.4 Serial Port Interface Features and Specifications 2.5 PCMCIA Card Interface Rev.1.01 Oct 28, .2008 2-14 REJ10J1351-0101 2.5 PCMCIA Card Interface PC card connector (J4) Features and Specifications 2.6 LAN Port Interface Features and Specifications 2.7 I/O Port Page Page Features and Specifications 2.8 Power Supply Circuit Features and Specifications 2.9 Clock Module SH7619(U1) Features and Specifications * ) Features and Specifications 2.11 Interrupt Switch Features and Specifications 2.12 E10A-USB Interface Page Page Operational Specifications 3.1 M3A-HS19 Connector Rev.1.01 Oct.28.2008 3-2 REJ10J1351-0101 3.1 M3A-HS19 Connectors Figure 3.1.1 shows the connector assignments on the M3A-HS19. Board Edge Top view of the component side 3.1.2 UART Connector (J2) J2 3.1.3 RS-422 Connector Pin (J3) Board Edge Top view of the solder side Page Board Edge Top view of the solder side Board Edge Top view of the component side 3.1.6 H-UDI Connector (J6) J6 1 7 H-UDI 8 14 Page Page 3.1.9 Expansion Connectors (J9-J13) Page Page Operational Specifications 3.2 Switches and LEDs Top view of the component side 3.2.1 Jumpers (JP1 - JP9) Page 3.2.2 Features of Switches and LEDs Top view of the component side Page Operational Specifications 3.3 Dimensions Page Page SH-2 SH7619 CPU BOARD M3A-HS19 Rev.C SCHEMATICS Serial SH7619 PCMCIA FLASHSDRAM SH7619 15.625MHz CERALOCK 5 H-UDI 15.625MHz FLASH CSC CHANNEL 0 16bit access = 4MB EDS1216AATA FLASH MEMORY SDRAM EEPROM SERIAL CONNECTOR(RS232C) UART connector mount hole = GND Registor Mounting Table Little Ether/User LED User Port IADJ = 55A for TC7S08FU Vout = 1.799V IADJ = 55A R98 0R -> 22R IRQ0 SWITCH CIRCUIT IRQ0 NMI NMI SWITCH CIRCUIT AGND-GND TEST PIN